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FSB67508 датащи(PDF) 3 Page - Fairchild Semiconductor

номер детали FSB67508
подробное описание детали  Smart Power Module (SPM)
Download  8 Pages
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FSB67508 датащи(HTML) 3 Page - Fairchild Semiconductor

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FSB67508 Rev. A
Electrical Characteristics (T
J = 25°C, VCC=VBS=15V Unless Otherwise Specified)
Inverter Part (Each MOSFET Unless Otherwise Specified)
Control Part (Each HVIC Unless Otherwise Specified)
Note:
1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each FET inside SPM
®. V
PN should be sufficiently less than this value considering the
effect of the stray inductance so that VDS should not exceed BVDSS in any case.
2. tON and tOFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the
field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 3 for the switching time definition with the switching test circuit of Figure 4.
3. The peak current and voltage of each FET during the switching operation should be included in the safe operating area (SOA). Please see Figure 4 for the RBSOA test circuit
that is same as the switching test circuit.
Package Marking & Ordering Information
Symbol
Parameter
Conditions
Min
Typ
Max
Units
BVDSS
Drain-Source Breakdown
Voltage
VIN= 0V, ID = 250μA (Note 2)
75
-
-
V
ΔBV
DSS/
ΔT
J
Breakdown Voltage Tem-
perature Coefficient
ID = 250μA, Referenced to 25°C
-
0.6
-
V
IDSS
Zero Gate Voltage
Drain Current
VIN= 0V, VDS = 75V
-
-
250
μA
RDS(on)
Static Drain-Source
On-Resistance
VCC = VBS = 15V, VIN = 5V, ID = 15A
-
9.4
11
m
Ω
VSD
Drain-Source Diode
Forward Voltage
VCC = VBS = 15V, VIN = 0V, ID = 15A
-
-
1.2
V
tON
Switching Times
VPN = 48V, VCC = VBS = 15V, ID = 15A
VIN = 0V ↔ 5V
Inductive load L=3mH
High- and low-side FET switching
(Note 3)
-
550
-
ns
tOFF
-
2000
-
ns
trr
-
100
-
ns
EON
-
40
-
μJ
EOFF
-
190
-
μJ
RBSOA
Reverse-bias Safe Oper-
ating Area
VPN = 55V, VCC = VBS = 15V, ID = IDP, VDS=BVDSS,
TJ = 150°C
High- and low-side FET switching (Note 3)
Full Square
Symbol
Parameter
Conditions
Min
Typ Max
Units
IQCC
Quiescent VCC Current
VCC=15V, VIN=0V Applied between VCC and COM
-
-
160
μA
IQBS
Quiescent VBS Current
VBS=15V, VIN=0V
Applied between VB(U)-U,
VB(V)-V, VB(W)-W
-
-
100
μA
UVCCD
Low-side Undervoltage
Protection (Figure 6)
VCC Undervoltage Protection Detection Level
7.4
8.0
9.4
V
UVCCR
VCC Undervoltage Protection Reset Level
8.0
8.9
9.8
V
UVBSD
High-side Undervoltage
Protection (Figure 7)
VBS Undervoltage Protection Detection Level
7.4
8.0
9.4
V
UVBSR
VBS Undervoltage Protection Reset Level
8.0
8.9
9.8
V
VIH
ON Threshold Voltage
Logic High Level
Applied between IN and COM
3.0
-
-
V
VIL
OFF Threshold Voltage
Logic Low Level
-
-
0.8
V
IIH
Input Bias Current
VIN = 5V
Applied between IN and COM
-
10
20
μA
IIL
VIN = 0V
-
-
2
μA
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FSB67508
FSB67508
SPM10-AA
_
_
19


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