74AUP1G885GM datasheet(11/19 Pages) NXP

номер детали	74AUP1G885GM

подробное описание детали	Low-power dual function gate

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производитель	NXP [NXP Semiconductors]

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11 / 19 page

74AUP1G885_5

Product data sheet

Rev. 05 — 26 June 2009

11 of 19

NXP Semiconductors

74AUP1G885

Low-power dual function gate

[1]

All typical values are measured at nominal VCC.

[2]

tpd is the same as tPLH and tPHL.

[3]

All speciﬁed values are the average typical values over all stated loads.

[4]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

Σ(C

L × VCC

2

× f

o) = sum of the outputs.

12. Waveforms

CL = 5 pF, 10 pF, 15 pF and 30 pF

CPD

power dissipation

capacitance

fi = 1 MHz; VI = GND to VCC

[3][4]

VCC = 0.8 V

-

2.7

-

pF

VCC = 1.1 V to 1.3 V

-

2.9

-

pF

VCC = 1.4 V to 1.6 V

-

3.0

-

pF

VCC = 1.65 V to 1.95 V

-

3.1

-

pF

VCC = 2.3 V to 2.7 V

-

3.5

-

pF

VCC = 3.0 V to 3.6 V

-

4.1

-

pF

Table 8.

Dynamic characteristics …continued

Voltages are referenced to GND (ground=0V; for test circuit see Figure 7.

Symbol Parameter

Conditions

25

°C

−40 °C to +125 °C

Unit

Min

Typ[1]

Max

Min

Max

(85

°C)

Max

(125

°C)

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 6.

The data input (A, B, C) to output (nY) propagation delays

001aae356

VM

VOL

VOH

tPLH

tPHL

nY output

VI

GND

A, B, C input

Table 9.

Measurement points

Supply voltage

Output

Input

VCC

VM

VI

tr = tf

0.8 V to 3.6 V

0.5

× V

CC

0.5

× V

CC

VCC

≤ 3.0 ns

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Аналогичный номер детали - 74AUP1G885GM

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