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TYN256P датащи(PDF) 3 Page - Power Integrations, Inc. |
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TYN256P датащи(HTML) 3 Page - Power Integrations, Inc. |
3 / 20 page B 8/99 TNY256 3 TinySwitch Functional Description TinySwitch combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (Pulse Width Modulator) controllers, TinySwitch uses a simple ON/OFF control to regulate the output voltage. The TNY256 controller consists of an Oscillator, Enable (Sense and Logic) circuit, 5.8 V Regulator, Bypass pin Under-Voltage circuit, Over Temperature Protection, Current Limit circuit, Leading Edge Blanking and a 700 V power MOSFET. The TNY256 incorporates additional circuitry for Line Under-Voltage Sense, Auto-Restart and Frequency Jitter. Figure 2 shows the functional block diagram with the most important features. Oscillator The typical oscillator frequency is internally set to an average of 130 kHz. Two signals are generated from the oscillator, the Maximum Duty Cycle signal (DC MAX) and the Clock signal that indicates the beginning of each cycle. The TNY256 oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 5 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter (1 kHz) is set to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure4 illustrates the frequency jitter of the TNY256. Enable Input Circuit The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.5 V. The current through the source follower is limited to 50 µA with 10 µA of hysteresis. When the current drawn out of the this pin exceeds 50 µA, a low logic level (disable) is generated at the output of the enable circuit. This output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled), otherwise the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored. Under most operating conditions (except when close to no- load), the low impedance of the source follower, keeps the voltage on the EN/UV pin from going much below 1.5 V, in the disabled state. This improves the response time of the optocoupler that is usually connected to this pin. 5.8 V Regulator The 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node for the TinySwitch. When the MOSFET is on, the TinySwitch runs off of the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows the TinySwitch to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 0.1 µF is sufficient for both high frequency de-coupling and energy storage. BYPASS Pin Under-Voltage The BYPASS pin under-voltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 5.1 V. Once the BYPASS pin voltage drops below 5.1 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET. Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is set at 135 oC with 70 oC hysteresis. When the die temperature rises above this threshold (135 oC) the power MOSFET is disabled and remains disabled until the die temperature falls by 70 oC, at which point it is re-enabled. Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (I LIMIT), the power MOSFET is turned off for the remainder of that cycle. The leading edge blanking circuit inhibits the current limit comparator for a short time (t LEB) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by primary-side capacitance and secondary-side rectifier reverse recovery time will not cause premature termination of the switching pulse. Auto-Restart In the event of a fault condition such as output overload, output Figure 4. Frequency Jitter. 0 .5 1 Time ( µs) 0 100 200 400 500 600 300 V DRAIN 132.5 kHz 127.5 kHz |
Аналогичный номер детали - TYN256P |
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Аналогичное описание - TYN256P |
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