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SN74AUC2G79DCTRE4 датащи(PDF) 1 Page - Texas Instruments

номер детали SN74AUC2G79DCTRE4
подробное описание детали  DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

SN74AUC2G79DCTRE4 датащи(HTML) 1 Page - Texas Instruments

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FEATURES
Seemechanicaldrawingsfordimensions.
DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOMVIEW)
1
V
CC
8
1CLK
2
7
1D
1Q
3
6
2Q
2D
4
5
GND
2CLK
3
6
2D
2Q
8
1
V
CC
1CLK
5
GND
4
2CLK
2
7
1Q
1D
GND
5
4
2CLK
3 6
2D
2Q
2 7
1Q
1D
8
V
CC
1
1CLK
DESCRIPTION/ORDERING INFORMATION
SN74AUC2G79
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES536C – DECEMBER 2003 – REVISED JANUARY 2007
• Available in the Texas Instruments
• Max t
pd of 1.9 ns at 1.8 V
NanoFree™ Package
• Low Power Consumption, 10-µA Max I
CC
• Optimized for 1.8-V Operation and Is 3.6-V I/O
• ±8-mA Output Drive at 1.8 V
Tolerant to Support Mixed-Mode Signal
• Latch-Up Performance Exceeds 100 mA Per
Operation
JESD 78, Class II
• I
off Supports Partial Power-Down-Mode
• ESD Performance Tested Per JESD 22
Operation
2000-V Human-Body Model
• Sub-1-V Operable
(A114-B, Class II)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed
specifically for 1.65-V to 1.95-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without
affecting the levels at the outputs.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoFree™ – WCSP (DSBGA)
Reel of 3000
SN74AUC2G79YZPR
_ _ _UR_
0.23-mm Large Bump – YZP (Pb-free)
–40
°C to 85°C
SSOP – DCT
Reel of 3000
SN74AUC2G79DCTR
U79_ _ _
VSSOP – DCU
Reel of 3000
SN74AUC2G79DCUR
U79_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
• = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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