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SN74AUP1G17DCKRE4 датащи(PDF) 2 Page - Texas Instruments

номер детали SN74AUP1G17DCKRE4
подробное описание детали  LOW-POWER SINGLE SCHMITT-TRIGGER BUFFER
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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SN74AUP1G17DCKRE4 датащи(HTML) 2 Page - Texas Instruments

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AUP
LVC
AUP
AUP
LVC
Static-Power Consumption
(
µA)
Dynamic-Power Consumption
(pF)
Single, dual, and triple gates
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
−0.5
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
15
20
25
30
35
40
45
Time − ns
AUP1G08 data at CL = 15 pF
Switching Characteristics
at 25 MHz
Output
Input
SN74AUP1G17
SCES579I – JUNE 2004 – REVISED MARCH 2010
www.ti.com
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition
and better switching-noise immunity at the input.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
ORDERABLE PART
TOP-SIDE
TA
PACKAGE(2)
NUMBER
MARKING(3)
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G17YFPR
_ _ _H7_
0.23-mm Large Bump – YFP (Pb-free)
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G17YZPR
_ _ _H7_
0.23-mm Large Bump – YZP (Pb-free)
QFN – DRY
Reel of 5000
SN74AUP1G17DRYR
H7
uQFN – DSF
Reel of 5000
SN74AUP1G17DSFR
H7
–40°C to 85°C
Reel of 3000
SN74AUP1G17DBVR
SOT (SOT-23) – DBV
H17_
Reel of 250
SN74AUP1G17DBVT
Reel of 3000
SN74AUP1G17DCKR
SOT (SC-70) – DCK
H7_
Reel of 250
SN74AUP1G17DCKT
SOT (SOT-553) – DRL
Reel of 4000
SN74AUP1G17DRLR
H7_
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
OUTPUT
A
Y
H
H
L
L
2
Submit Documentation Feedback
Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G17


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