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74LVT16500ADL датащи(PDF) 10 Page - NXP Semiconductors |
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74LVT16500ADL датащи(HTML) 10 Page - NXP Semiconductors |
10 / 19 page 74LVT16500A_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 03 — 29 May 2006 10 of 19 Philips Semiconductors 74LVT16500A 3.3 V 18-bit universal bus transceiver; 3-state tsu(L) setup time LOW An to CPAB or Bn to CPBA see Figure 10 2.5 - - ns An to LEAB with CPAB LOW or Bn to LEBA with CPBA LOW see Figure 10 2.2 - - ns An to LEAB with CPAB HIGH or Bn to LEBA with CPBA HIGH see Figure 10 2.7 - - ns th(H) hold time HIGH An to CPAB or Bn to CPBA see Figure 10 0 --ns An to LEAB or Bn to LEBA see Figure 10 0 --ns th(L) hold time LOW An to CPAB or Bn to CPBA see Figure 10 0 --ns An to LEAB or Bn to LEBA see Figure 10 0 --ns tWH pulse width HIGH CPAB or CPBA see Figure 6 1.5 - - ns LEAB or LEBA see Figure 7 1.5 - - ns tWL pulse width LOW CPAB or CPBA see Figure 6 1.5 - - ns VCC = 3.0 V ± 0.3 V; Tamb = −40 °C to 85 °C[1] tPLH propagation delay An to Bn or Bn to An see Figure 5 0.5 1.9 4.2 ns CPAB to Bn or CPBA to An see Figure 6 1.0 3.2 5.4 ns LEAB to Bn or LEBA to An see Figure 7 1.0 2.4 5.4 ns tPHL propagation delay An to Bn or Bn to An see Figure 5 0.5 1.9 4.2 ns CPAB to Bn or CPBA to An see Figure 6 1.0 3.2 5.4 ns LEAB to Bn or LEBA to An see Figure 7 1.0 2.9 5.4 ns tPZH output enable time to HIGH-level see Figure 8 1.0 2.4 4.8 ns tPZL output enable time to LOW-level see Figure 9 1.0 2.2 4.8 ns tPHZ output disable time from HIGH-level see Figure 8 1.0 2.8 5.8 ns tPLZ output disable time from LOW-level see Figure 9 1.0 3.2 5.2 ns tsu(H) setup time HIGH An to CPAB or Bn to CPBA see Figure 10 2.4 1.0 - ns An to LEAB with CPAB LOW or Bn to LEBA with CPBA LOW see Figure 10 2.3 0.9 - ns An to LEAB with CPAB HIGH or Bn to LEBA with CPBA HIGH see Figure 10 2.4 0.9 - ns tsu(L) setup time LOW An to CPAB or Bn to CPBA see Figure 10 2.4 0.7 - ns An to LEAB with CPAB LOW or Bn to LEBA with CPBA LOW see Figure 10 2.3 0.9 - ns An to LEAB with CPAB HIGH or Bn to LEBA with CPBA HIGH see Figure 10 2.4 0.8 - ns Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11. Symbol Parameter Conditions Min Typ Max Unit |
Аналогичный номер детали - 74LVT16500ADL |
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Аналогичное описание - 74LVT16500ADL |
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