поискавой системы для электроныых деталей |
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KM62256CLG-5L датащи(PDF) 5 Page - Samsung semiconductor |
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KM62256CLG-5L датащи(HTML) 5 Page - Samsung semiconductor |
5 / 9 page Revision 4.0 KM62256C Family CMOS SRAM December 1997 5 CL1) 1. Including scope and jig capacitance TEST CONDITIONS (Test Load and Test Input/Output Reference) Input pulse level : 0.8 to 2.4V Input rising and falingl time : 5ns input and output reference voltage : 1.5V Output load (See right) :CL=100pF+1TTL AC OPERATING CONDITIONS AC CHARACTERISTICS(Vcc=4.5~5.5V, KM62256C Family : TA=0 to 70 °C, KM62256CE Family : TA=-25 to 85°C, KM62256CI Family : TA=-40 to 85 °C) Parameter List Symbol Speed Bins Units 55ns 70ns Min Max Min Max Read Read cycle time tRC 55 - 70 - ns Address access time tAA - 55 - 70 ns Chip select to output tCO - 55 - 70 ns Output enable to valid output tOE - 25 - 35 ns Chip select to low-Z output tLZ 10 - 10 - ns Output enable to low-Z output tOLZ 5 - 5 - ns Chip disable to high-Z output tHZ 0 20 0 30 ns Output disable to high-Z output tOHZ 0 20 0 30 ns Output hold from address change tOH 5 - 5 - ns Write Write cycle time tWC 55 - 70 - ns Chip select to end of write tCW 45 - 60 - ns Address set-up time tAS 0 - 0 - ns Address valid to end of write tAW 45 - 60 - ns Write pulse width tWP 40 - 50 - ns Write recovery time tWR 0 - 0 - ns Write to output high-Z tWHZ 0 20 0 25 ns Data to write time overlap tDW 25 - 30 - ns Data hold from write time tDH 0 - 0 - ns End write to output low-Z tOW 5 - 5 - ns DATA RETENTION CHARACTERISTICS Item Symbol Test Condition Min Typ Max Unit Vcc for data retention VDR CS ≥Vcc-0.2V 2.0 - 5.5 V Data retention current IDR KM62256CL KM62256CL-L Vcc=3.0V CS ≥Vcc-0.2V L-Ver LL-Ver - - 1 0.5 50 10 µA KM62256CLE KM62256CLE-L L-Ver LL-Ver - - - - 50 25 KM62256CLI KM62256CLI-L L-Ver LL-Ver - - - - 50 25 Data retention set-up time tSDR See data retention waveform 0 - - ms Recovery time tRDR 5 - - |
Аналогичный номер детали - KM62256CLG-5L |
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Аналогичное описание - KM62256CLG-5L |
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