TDA8594J datasheet(11/48 Pages) NXP

номер детали	TDA8594J

подробное описание детали	I2C-bus controlled 4 X 50 W power amplifier

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TDA8594_2

Product data sheet

Rev. 02 — 11 December 2007

11 of 48

NXP Semiconductors

TDA8594

I2C-bus controlled 4

× 50 W power ampliﬁer

7.9 Power-on reset and supply voltage spikes

If in I2C-bus mode the supply voltage drops below 5 V (see Figure 9), the content of the

I2C-bus latches cannot be guaranteed and the power-on reset will be activated. All latches

are reset, the ampliﬁer is switched off and the DIAG pin is pulled LOW to indicate that a

power-on reset has occurred (bit DB2[D7]). When IB1[D0] is set, the power-on ﬂag is

reset, the DIAG pin will be released and the ampliﬁer will start up.

In legacy mode a supply voltage drop below 5 V will switch off the ampliﬁer and the DIAG

pin will not be pulled LOW.

7.10 Engine start and low voltage operation

The DC output voltage of the ampliﬁer (VO) is set to half of the supply voltage and is

related to the voltage on the SVR pin (see Figure 7; VO =VSVR − 1.4 V). A capacitor is

connected on the SVR pin to suppress the ripple on the power supply.

If the supply voltage drops, for instance, during an engine start, the output follows slowly

due to the SVR capacitor. The headroom voltage is the voltage needed for good operation

of the ampliﬁer and is deﬁned as Vhr =VP − VO (see Figure 7). If the headroom voltage

becomes lower than the headroom protection threshold of 1.6 V, the headroom protection

is activated to prevent pop noise at the output. This protection ﬁrst activates the fast mute

and then discharges the capacitors on the SVR and ACGND pins to generate more

headroom for the ampliﬁer (see Figure 8).

Fig 6.

Start-up and shut-down timing in legacy mode

tamp_on

td(mute_off)

fast

mute

soft

mute

VP

DIAG

001aad171

STB

on

mute

standby

SVR

amplifier

output

toff

td(soft_mute)

td(mute_on)

td(fast_mute)

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