No. 4909-5/13

LC8220

Continued from preceding page.

Note 1, 2, 3, 4, 5: These items are related to the CPU type.

6:

7:

Must be pulled up.

8:

These are NC pins.

9:

Pin No.

Symbol

I/O

Function

110

—

+5 V power supply

111

—

Ground

112

PXD7

I/O

113

PXD6

I/O

114

PXD5

I/O

115

PXD4

I/O

Pixel data bus

116

PXD3

I/O

117

PXD2

I/O

118

PXD1

I/O

119

PXD0

I/O

120

—

+5 V power supply

121

—

Ground

122

PXSIZE0

I

Bus width selection for the pixel bus

123

PXSIZE1

I

(PXSIZE [1,0] = 00: 8 bits, 01: 16 bits, 1*: 32 bits)

124

(NC)

—

125

CDCS

I

126

CDRD

I

127

CDWR

I

128

CDRDY

O

129

CDINT

O

Code bus interrupt request

130

CDRLS

I

Code bus interrupt release

131

CDEND

O

Code bus last data output

132

CDFLSH

I

Code bus forcible buffer flush

133

(NC)

—

134

(NC)

—

135

(NC)

—

136

(NC)

—

137

(NC)

—

138

CPUCD

I

139

CDSIZE

I

Bus width setting for the code bus (0: 8 bits, 1: 16 bits)

140

—

+5 V power supply

141

—

Ground

142

CDD15

I/O

143

CDD14

I/O

144

CDD13

I/O

145

CDD12

I/O

146

CDD11

I/O

147

CDD10

I/O

148

CDD9

I/O

149

CDD8

I/O

150

—

+5 V power supply

151

—

Ground

152

CDD7

I/O

153

CDD6

I/O

154

CDD5

I/O

155

CDD4

I/O

Code data bus

156

CDD3

I/O

157

CDD2

I/O

158

CDD1

I/O

159

CDD0

I/O

160

—

+5 V power supply

8086 family CPU (CPU = 1)

CS

RD

WR

RDY

68000 family CPU (CPU = 0)

AS

R/W

DS

ACK