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FAN3224T датащи(PDF) 3 Page - Fairchild Semiconductor

номер детали FAN3224T
подробное описание детали  Application Review and Comparative Evaluation of Low-Side Gate Drivers
Download  12 Pages
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN3224T датащи(HTML) 3 Page - Fairchild Semiconductor

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AN-6069
APPLICATION NOTE
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.3 • 1/6/10
3
For a practical example, the gate-source voltage versus total
gate charge is reproduced from the Fairchild FCP20N60
power MOSFET datasheet in Figure 4. The curve was
produced using a test circuit that drives the gate of the
Device Under Test (DUT) with a small current source of
3mA. In this example, the gate charge needed to reach the
threshold voltage of 3V is approximately 7nC. The charge
required during interval t2, QGS2, is found to be 14nC – 7nC
= 7nC. In interval t3, the value of QGD is found to be QGD =
46nC – 14nC = 32nC. In this typical case, the effect of QGD
on the switching loss is more significant than the
contribution resulting from QGS2.
t4
t3
t2
t1
FCP20N60
Figure 4.
VGS vs. Qg for FCP20N60
With VGS at final drive level, the value for QG,total is known.
To find the average current required from the bias supply:
SW
G
DD
f
Q
I
=
(6)
where fsw is the switching frequency of the power stage.
With the average current requirement known, the input
power drawn from the VDD bias supply can be found as:
SW
G
DD
DD
DD
dr
f
Q
V
I
V
P
=
=
(7)
The circuit waveforms and current paths during inductive
load turn off are similar to those for turn on, but taken in a
reverse order. For brevity, the circuit waveforms are
indicated in Figure 5, but the current paths are not shown.
t8
t7
t6
t5
time
V
DD
V
PL
V
TH
I
L
V
o
-I
PK
-I
PL
V
DS
I
DS
V
GS
I
G
Figure 5.
MOSFET Turn Off with Inductive Load
In the t5 interval, IG rises to discharge VGS from VDD to the
plateau level defined by (2). In the t6 interval, VGS remains
at the plateau voltage while VDS rises to the off state voltage.
The t6 interval lasts for a time approximated by:
G
GD
rise
,
VDS
I
Q
t
6
t
=
=
(8)
In interval t7, the drain current IDS falls from the value of IL
to 0 while VGS falls from VPL to VTH. This time interval is
given by:
G
2
,
GS
fall
,
IDS
I
Q
t
7
t
=
=
(9)
In the t8 interval, VGS is discharged from the threshold
voltage to zero.
An equation relating IG to the switching loss during the turn
off interval is given as:
()
+
×
=
7
t
,
G
2
GS
6
t
,
G
GD
SW
LOAD
IN
OFF
.
SW
I
Q
I
Q
f
2
I
V
P
(10)


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