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TLC5929DBQR датащи(PDF) 11 Page - Texas Instruments

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номер детали TLC5929DBQR
подробное описание детали  16-Channel, Constant-Current LED Driver with 7-Bit Global Brightness Control, Power-Save Mode
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

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TLC5929
www.ti.com
SBVS159
– APRIL 2011
PIN DESCRIPTIONS
PIN
NAME
NO.
I/O
DESCRIPTION
Blank all outputs. When BLANK is high, all constant-current outputs (OUT0 to OUT15) are forced off.
BLANK
21
I
When BLANK is low, all constant-current outputs are controlled by the on/off control data in the data
latch.
Maximum current programming terminal. A resistor connected between IREF and GND sets the
maximum current for every constant-current output. When this terminal is directly connected to GND,
IREF
23
I/O
all outputs are forced off. The external resistor should be placed close to the device and must be in the
range of 1.32 k
Ω to 66.0 kΩ.
Data latch. The rising edge of LAT latches the data from the common shift register into the output
on/off data latch. At the same time, the data in the common shift register are replaced with SID, which
LAT
4
I
is selected by SIDLD. See the Output On/Off Data Latch section and Status Information Data (SID)
section for more details.
GND
1
Ground
OUT0
5
O
OUT1
6
O
OUT2
7
O
OUT3
8
O
OUT4
9
O
OUT5
10
O
OUT6
11
O
OUT7
12
O
Constant-current sink outputs. Multiple outputs can be configured in parallel to increase the
constant-current capability. Different voltages can be applied to each output.
OUT8
13
O
OUT9
14
O
OUT10
15
O
OUT11
16
O
OUT12
17
O
OUT13
18
O
OUT14
19
O
OUT15
20
O
Serial data shift clock. Data present on SIN are shifted to the LSB of the 17-bit shift register with the
SCLK
3
I
SCLK rising edge. Data in the shift register are shifted toward the MSB at each SCLK rising edge. The
MSB data of the common shift register appear on SOUT.
Serial data input for the 17-bit common shift register. When SIN is high, a
'1' is written to the LSB of
SIN
2
I
the common shift register at the rising edge of SCLK.
Serial data output of the 17-bit common shift register. SOUT is connected to the MSB of the 17-bit shift
SOUT
22
O
register. Data are clocked out at the rising edge of SCLK.
VCC
24
Power-supply voltage
Copyright
© 2011, Texas Instruments Incorporated
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