T

FLT

10 A

C =

t

1.35 V

´

TPS24700

TPS24701

www.ti.com

SLVSAL3B

– MARCH 2011 – REVISED MAY 2011

sources 10

reaches 1.35 V. In an application implementing auto-retry after a fault, this capacitor also determines the period

before the external MOSFET is re-enabled. A minimum timing capacitance of 1 nF is recommended to ensure

Equation 2.

(2)

The latch mode (TPS24700) or the retry mode (TPS24701) occurs if the load current exceeds the current limit

threshold or the fast-trip shutdown threshold. While in latch mode, the TIMER pin continues to charge and

discharge the attached capacitor periodically. In retry mode, the external MOSFET is disabled for sixteen cycles

of TIMER charging and discharging. The TIMER pin is pulled to GND by a 2-mA current source at the end of the

can also be discharged to GND during latch mode or retry mode by a 2-mA current source whenever any of the

following occurs:

•

•

VCC: This pin performs three functions. First, it provides biasing power to the integrated circuit. Second, it serves

as an input to the power-on reset (POR) and undervoltage lockout (UVLO) functions. The VCC trace from the

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© 2011, Texas Instruments Incorporated

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Product Folder Link(s): TPS24700 TPS24701