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TPD4E001DRLR датащи(PDF) 5 Page - Texas Instruments

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номер детали TPD4E001DRLR
подробное описание детали  4-CHANNEL ESD PROTECTION ARRAY WITH 1.5-pF IO CAPACITANCE
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TPD4E001DRLR датащи(HTML) 5 Page - Texas Instruments

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IO3
IO4
GND
IO2
IO1
0.1µF
V
CC
USB
Controller
R
T
V
BUS
D+
D–
GND
V
BUS
D+
D–
GND
D1
TPD4E001
www.ti.com
SLLS682F
– JULY 2006 – REVISED MAY 2011
APPLICATION INFORMATION
Detailed Description
When placed near the connector, the TPD4E001 ESD solution offers little or no signal distortion during normal
operation due to low IO capacitance and ultra-low leakage current specifications. The TPD4E001 ensures that
the core circuitry is protected and the system is functioning properly in the event of an ESD strike. For proper
operation, the following layout/ design guidelines should be followed:
1. Place the TPD4E001 solution close to the connector. This allows the TPD4E001 to take away the energy
associated with ESD strike before it reaches the internal circuitry of the system board.
2. Place a 0.1-
μF capacitor very close to the VCC pin. This limits any momentary voltage surge at the IO pin
during the ESD strike event.
3. Ensure that there is enough metallization for the VCC and GND loop. During normal operation, the TPD4E001
consumes nA leakage current. But during the ESD event, VCC and GND may see 15 A to
30 A of current, depending on the ESD level. Sufficient current path enables safe discharge of all the energy
associated with the ESD strike.
4. Leave the unused IO pins floating .
5. The VCC pin can be connected in two different ways:
(a) If the VCC pin is connected to the system power supply, the TPD4E001 works as a transient suppressor
for any signal swing above VCC + VF. A 0.1-μF capacitor on the device VCC pin is recommended for ESD
bypass.
(b) If the VCC pin is not connected to the system power supply, the TPD4E001 can tolerate higher signal
swing in the range up to 10V. Please note that a 0.1
μF capacitor is still recommended at the VCC pin for
ESD bypass.
Copyright
© 2006–2011, Texas Instruments Incorporated
5


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