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LA72730 датащи(PDF) 7 Page - Sanyo Semicon Device |
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LA72730 датащи(HTML) 7 Page - Sanyo Semicon Device |
7 / 8 page LA72730 Continued from preceding page. DC : voltage Pin No. Pin Name Function AC : level Equivalent Circuit 18 POVIDEO Video output DC : 1.4V 19 20 POALCR POALCL Audio output DC : 2.4V 200 Ω 10k Ω 22 PCREG Reference voltage DC : 2.4V 500 Ω 10k Ω 9.6k Ω 1k Ω I2C BUS serial interface specification (1) Data Transfer Manual This IC adopts control method (I2C-BUS) with serial data, and controlled by two terminals which called SCL (serial clock) and SDA (serial data).At first, set up *1 the condition of starting data transfer, and after that, input 8 bit data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes “H”, this IC pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2 data transfer stop condition, thus the transfer comes to close. *1 Defined by SDA fall down SCL during ‘H’ period. *2 Defined by SDA rise up SCL during ‘H’ period. (2) Transfer Data Format After transfer start condition, transfers slave address (92h : 1001 0010 ) to SDA terminal, control data, then, stop condition (See figure 1). Slave address is made up of 7bits, *3 8th bit shows the direction of transferring data, but this IC does not have READ mode, so that this bit fix to “L”. Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be canceled the transfer dates. *3 It is called R/W bit. Fig.1 DATA STRUCTURE START Condition Slave Address R/W L ACK Control data ACK STOP condition (3) Initialize This IC is initialized for circuit protection. Initial condition is shown on bitmap. No.A1059-7/8 |
Аналогичный номер детали - LA72730_10 |
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Аналогичное описание - LA72730_10 |
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