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SI9105DN02-T1 датащи(PDF) 3 Page - Vishay Siliconix |
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SI9105DN02-T1 датащи(HTML) 3 Page - Vishay Siliconix |
3 / 11 page Document Number: 70003 S-70497-Rev. I, 19-Mar-07 www.vishay.com 3 Vishay Siliconix Si9105 Notes: a. Refer to PROCESS OPTION FLOWCHART for additional information. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. e. Guaranteed by design, not subject to production test. f. CSTRAY Pin 8 = ≤ 5 pF. g .Temperature coefficient of rDS(on) is 0.75 % per °C, typical. SPECIFICATIONSa Parameter Symbol Test Conditions Unless Otherwise Specified DISCHARGE = - VIN = 0 V VCC = 10 V, + VIN = 48 V RBIAS = 820 kΩ, ROSC = 910 kΩ Limits Unit Tempb Minc Typd Maxc Error Amplifier Feedback Input Voltage VFB FB Tied to COMP OSC IN = - VIN (OSC Disabled) Room 3.96 4 4.04 V Input BIAS Current IFB OSC IN = - VIN, VFB = 4 V Room 25 500 nA Open Loop Voltage Gaine AVOL OSC IN = - VIN (OSC Disabled) Room 60 80 dB Input OFFSET Voltage VOS OSC IN = - VIN Room ± 15 ± 40 mV Unity Gain Bandwidthe BW Room 0.5 0.8 MHz Dynamic Output Impedance ZOUT Room 1 k Ω Output Current IOUT Source (VFB = 3.4 V) Room - 1.2 - 0.32 mA Sink (VFB = 4.5 V) Room 0.05 0.08 Power Supply Rejection PSRR 10 V ≤ V CC ≤ 13.5 V Room 70 dB Current Limit Threshold Voltage VSOURCE RL = 100 Ω from DRAIN to VCC VFB = 0 V Room 0.8 1.0 1.2 V Delay to Outpute td RL = 100 Ω from DRAIN to VCC VSOURCE = 1.5 V, See Figure 1 Room 200 300 ns Input Voltage + VIN IIN = 10 µA Room 120 V Input Leakage Current + IIN VCC ≥ 10 V Room 10 µA Pre-Regulator Start-Up Current ISTART Pulse Width ≤ 300 µs, V CC = 7 V Room 8 15 mA VCC Pre-Regulator Turn-Off Threshold Voltage VREG IPRE-REGULATOR = 10 µA Room 7.5 9.3 9.7 V Undervoltage Lockout VUVLO RL = 100 Ω from DRAIN to VCC See Detailed Description Room 7.0 8.7 9.2 VREG - VUVLO VDELTA Room 0.25 0.5 Supply Supply Current ICC Room 0.35 0.5 mA Bias Current IBIAS Room 7.5 µA SHUTDOWN Delay tSD VSOURCE = - VIN, See Figure 2 Room 50 100 ns SHUTDOWN Pulse Width tSW See Figure 3 Room 50 RESET Pulse Width tRW Room 50 Latching Pulse Width SHUTDOWN and RESET Low tLW Room 25 Input Low Voltage VIL Room 2.0 V Input High Voltage VIH Room 8.0 Input Current Input Voltage High IIH VIN = 10 V Room 1 5 µA Input Current Input Voltage Low IIL VIN = 0 V Room - 35 - 25 MOSFET Switch Breakdown Voltage V(BR)DSS IDRAIN = 100 µA Full 200 220 V Drain-Source On Resistanceg rDS(on) IDRAIN = 100 mA Room 5 7 Ω Drain Off Leakage Current IDSS VDRAIN = 100 V Room 10 µA Drain Capacitance CDS Room 35 pF |
Аналогичный номер детали - SI9105DN02-T1 |
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Аналогичное описание - SI9105DN02-T1 |
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