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Document Number: 70787

S11-0975-Rev. F, 16-May-11

Vishay Siliconix

Si9241A

This document is subject to change without notice.

PIN CONFIGURATION

FUNCTIONAL DESCRIPTION

The Si9241AEY can be either in transmit or receive mode

detection circuits.

then RX output will be "high".

In order to be in transmit mode, CS must be set "low". When

CS and TX are set "low" the internal MOSFET will turn on,

causing the K pin to be "low". In the transmit mode, the

processor monitors RX and TX. When the two mirror each

other there is no fault. In the event of over temperature, or

to protect the IC and the external open drain FAULT pin will

be asserted. The K pin will stay in high impedance and RX

will follow the K pin. The fault will be reset when CS is toggled

high. RX, CS and TX pins have an internal pull up resistor to

off.

When CS is set "high" the Si9241AEY is in receive mode and

the internal MOSFET for the K pin is turned off. The RX

output will follow the K pin. If CS is "low" while the IC is

receiving data, an incorrect fault signal will occur.

To inhibit the short detect, tie CS and TX together.

1

2

3

4

5

6

7

8

Top View

Narrow Body

TX

FAULT

K

GND

SO Package

CS

RX

ORDERING INFORMATION

Part Number

Temperature Range

Si9241AEY-T1

- 40 °C to 125 °C

Si9241AEY-T1-E3 (Lead (Pb)-free)

PIN DESCRIPTION

Pin Number

Symbol

Description

1

Positive Power Supply

2

TX

Transmit, Input

3CS

Chip Select, Input

4FAULT

Fault, Open Drain Output

5

GND

Ground Connection

6

K

Transmit/Receive, Bidirectional

7

Battery Power Supply

8

RX

Receiver, Output