ver. 2.8

12/02/03

10

ES51996(6000counts)

DMM Analog front end/Insulation

MPU could send the read data command to get the result of ADC conversion

The next table shows the content of read command.

Byte

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

ID

1

1

0

0

1

0

BUZ

R/W=1

R1

ASIGN

BSIGN

PMAX

PMIN

BTS0

BTS1

STA0

ALARM

R2

HF

LF

LDUTY

STA1

F_FIN

D0:0

D0:1

D0:2

R3

D0:3

D0:4

D0:5

D0:6

D0:7

D0:8

D0:9

D0:10

R4

D0:11

D0:12

D0:13

D0:14

D0:15

D0:16

D0:17

D0:18

R5

D1:0

D1:1

D1:2

D1:3

D1:4

D1:5

D1:6

D1:7

R6

D1:8

D1:9

D2:0

D2:1

D2:2

D2:3

D2:4

D2:5

R7

D2:6

D2:7

D2:8

D2:9

D2:10

D2:11

D2:12

D2:13

R8

D2:14

D2:15

D2:16

D2:17

D2:18

D3:0

D3:1

D3:2

R9

D3:3

D3:4

D3:5

D3:6

D3:7

D3:8

D3:9

D3:10

R10

D3:11

D3:12

D3:13

D3:14

D3:15

D3:16

D3:17

D3:18

MCU access slow ADC output only, ten FADC conversion cycle delay is necessary. DATA_NEW for

frequency or capacitance mode will be active when D0 or D3 data ready.

data is 6300 counts for SADC and 604 counts for FADC. The maximum counts for PEAK mode is 10300, so

D0 bit 13-18 could be ignored..

The ADC data output for measurement mode: F3/F2/F1/F0

F3

F2

F1

F0

Measurement mode

Read data bytes

0

0

0

0

V mode

D0(0:18), D1(0:9)

0

0

0

1

ACV + Hz mode

D0(0:18), D1(0:9), D3(0:18)

0

0

1

0

A mode

D0(0:18), D1(0:9)

0

0

1

1

ACA + Hz mode

D0(0:18), D1(0:9), D3(0:18)

0

1

0

0

Resistance mode

D0(0:18), D1(0:9)

0

1

0

1

Continuity mode

D0(0:18), D1(0:9)

0

1

1

0

Diode mode

D0(0:18), D1(0:9)

0

1

1

1

F + duty mode

D0(0:18), D2(0:18), D3(0:18)

1

0

0

0

Capacitance Mode

D0(0:18)

1

0

0

1

ADP mode

D0(0:18), D1(0:9)

1

0

1

0

ADP + Hz mode

D0(0:18), D1(0:9), D3(0:18)

1

1

1

1

Insulation mode

D0(0:18)