3

®

DAC813

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

DCOM with respect to ACOM .............................................................

±4V

External Voltage Applied to BPO Span Resistor ..............................

±V

CC

Power Dissipation .......................................................................... 750mW

Lead Temperature (soldering, 10s) ............................................... +300

°C

Max Junction Temperature ............................................................ +165

°C

Thermal Resistance,

θ

Ceramic DIP ......................................... 85

°C/W

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”

may cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

PIN

NAME

DESCRIPTION

2, 3

20V Range

FSR. Connect both to Pin 9 for a 10V FSR.

4

BPO

100

Ω resistor or 200Ω potentiometer for bipolar

operation.

5

ACOM

Analog common,

±V

+10V reference output referred to ACOM.

adjustment potentiometer or a 500

Ω resistor.

Analog supply input, nominally +12V to +15V

referred to ACOM.

D/A converter voltage output.

10

Analog supply input, nominally –12V or –15V

referred to ACOM.

11

WR

Master enable for LDAC, LLSB, and LMSB. Must

be low for data transfer to any latch.

12

LDAC

Load DAC. Must be low with WR for data transfer

to the D/A latch and simultaneous update of the

D/A converter.

13

Reset

When low, resets the D/A latch such that a Bipolar

Zero output is produced. This control overrides all

other data input operations.

14

LMSB

NOTE: This logic path is slower than the WR path.

15

LLSB

NOTE: This logic path is slower than the WR path.

16

DCOM

Digital common.

17

D0

Data Bit 1, LSB.

18

D1

Data Bit 2.

19

D2

Data Bit 3.

20

D3

Data Bit 4.

21

D4

Data Bit 5.

22

D5

Data Bit 6.

23

D6

Data Bit 7.

24

D7

Data Bit 8.

25

D8

Data Bit 9.

26

D9

Data Bit 10.

27

D10

Data Bit 11.

28

D11

Data Bit 12, MSB, positive true.

PIN DESCRIPTIONS

ELECTROSTATIC

DISCHARGE SENSITIVITY

Electrostatic discharge can cause damage ranging from per-

formance degradation to complete device failure. Burr-

Brown Corporation recommends that all integrated circuits

be handled and stored using appropriate ESD protection

methods.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet

published specifications.

PACKAGE/ORDERING INFORMATION

PACKAGE

LINEARITY

GAIN

DRAWING

TEMPERATURE

ERROR, MAX

DRIFT

PRODUCT

PACKAGE

RANGE

AT +25

(ppm/

DAC813JP

28-Pin Plastic DIP

246

0

°C to +70°C

±1/2

±30

DAC813JU

28-Lead Plastic SOIC

217

0

°C to +70°C

±1/2

±30

DAC813KP

28-Pin Plastic DIP

246

0

°C to +70°C

±1/4

±15

DAC813KU

28-Lead Plastic SOIC

217

0

°C to +70°C

±1/4

±15

DAC813AU

28-Lead Plastic SOIC

217

–40

°C to +85°C

±1/2

±30

NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.