SN74AC11EP

TRIPLE 3INPUT POSITIVEAND GATE

SCLS557 − JANUARY 2004

1

POST OFFICE BOX 655303

− One Assembly/Test Site, One Fabrication

Site

Sources (DMS) Support

† Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

description/ordering information

The SN74AC11 device contains three independent 3-input AND gates. This device performs the Boolean

function Y = A

• B • C or Y = A + B + C in positive logic.

ORDERING INFORMATION

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 85°C

SOIC − D

Tape and reel

SN74AC11IDREP§

SAC11EP

−40

°C to 85°C

TSSOP − PW

Tape and reel

SN74AC11IPWREP

SAC11EP

‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

§ Product Preview

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

C

OUTPUT

Y

H

H

H

H

L

XX

L

X

LX

L

X

X

L

L

D OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

2A

2B

2C

2Y

GND

1C

1Y

3A

3B

3C

3Y

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Copyright

 2004, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.