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ISL267450 датащи(PDF) 5 Page - Intersil Corporation

номер детали ISL267450
подробное описание детали  12-Bit, 1MSPS SAR ADCs
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производитель  INTERSIL [Intersil Corporation]
домашняя страница  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL267450 датащи(HTML) 5 Page - Intersil Corporation

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ISL267450
5
FN8341.0
August 10, 2012
Absolute Maximum Ratings
Thermal Information
Any Pin to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Analog Input to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Digital I/O to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V
Maximum Current In to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
ESD Rating
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 8kV
Machine Model (Tested per JESD22-A115B) . . . . . . . . . . . . . . . . . 400V
Charged Device Model (Tested per JESD22-C101E). . . . . . . . . . . . 1.5kV
Latch Up (Tested per JESD78C; Class 2, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
θJA (°C/W)
θJC (°C/W)
8 Ld SOIC Package (Notes 4, 5). . . . . . . . . .
120
64
8 Ld MSOP Package (Notes 4, 5). . . . . . . . .
165
64
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For
θJC, the “case temp” location is taken at the package top center.
Electrical Specifications VDD = +3.0V to +3.3V, FSCLK = 15MHz, FS = 833kSPS, VREF = 1.25V, FIN = 200kHz; VDD = +4.75V to
+5.25V, FSCLK = 18MHz, FS =1MSPS, VREF = 2.5V, FIN = 300kHz; VCM = VREF, TA = TMIN to TMAX unless otherwise noted. Typical values are at
TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
DYNAMIC PERFORMANCE
SINAD
Signal-to (Noise + Distortion) Ratio
VDD = 5V
70
dB
VDD = 3V
67
dB
THD
Total Harmonic
Distortion
VDD = 5V
-80
-75
dB
VDD = 3V
-78
-73
dB
SFDR
Spurious Free Dynamic Range
VDD = 5V
-82
-75
dB
VDD = 3V
-80
-73
dB
IMD
Intermodulation Distortion
2nd Order Terms
–89
dB
3rd Order Terms
-85
dB
tpd
Aperture Delay
10
ns
Δtpd
Aperture Jitter
50
ps
β3dB
Full Power Bandwidth
@ –3dB
20
MHz
@ –0.1dB
2.5
MHz
PSRR
Power Supply Rejection Ratio
-87
dB
DC ACCURACY
NResolution
12
Bits
INL
Integral Nonlinearity
-1
1
LSB
DNL
Differential Nonlinearity
Guaranteed no missed codes to 12 bits
-0.95
0.95
LSB
OFFSET
Zero-Code Error
VDD = 5V
-3
3
LSB
VDD = 3V
-6
6
LSB
GAIN
Positive Gain Error
VDD = 5V
-3
3
LSB
VDD = 3V
-6
6
LSB
Negative Gain Error
VDD = 5V
-3
3
LSB
VDD = 3V
-6
6
LSB


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