SN54LV240, SN74LV240

OCTAL BUFFERS/DRIVERS

WITH 3STATE OUTPUTS

SCLS193B − FEBRUARY 1993 − REVISED APRIL 1996

4

POST OFFICE BOX 655303

POST OFFICE BOX 1443

(unless otherwise noted) (see Figure 1)

FROM

TO

SN54LV240

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V ± 0.5 V

VCC = 3.3 V ± 0.3 V

VCC = 2.7 V

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

TYP

MAX

MIN

TYP

MAX

MIN

MAX

UNIT

tpd

A

Y

7

13

9

16

18

ns

ten

OE

Y

11

18

14

24

28

ns

tdis

OE

Y

12

23

14

24

25

ns

(unless otherwise noted) (see Figure 1)

FROM

TO

SN74LV240

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V ± 0.5 V

VCC = 3.3 V ± 0.3 V

VCC = 2.7 V

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

TYP

MAX

MIN

TYP

MAX

MIN

MAX

UNIT

tpd

A

Y

7

13

9

16

18

ns

ten

OE

Y

11

18

14

24

28

ns

tdis

OE

Y

12

23

14

24

25

ns

PARAMETER

TEST CONDITIONS

VCC

TYP

UNIT

Outputs enabled

3.3 V

45

Cpd

Power dissipation capacitance per buffer/driver

Outputs disabled

CL = 50 pF,

f = 10 MHz

3.3 V

2.5

pF

Cpd

Power dissipation capacitance per buffer/driver

Outputs enabled

CL = 50 pF,

f = 10 MHz

5 V

78

pF

Outputs disabled

5 V

3

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design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.