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TPD4146K датащи(PDF) 10 Page - Toshiba Semiconductor

номер детали TPD4146K
подробное описание детали  TOSHIBA Intelligent Power Device High Voltage Monolithic Silicon Power IC
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

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TPD4146K
2012-02-09
10
External Parts
Typical external parts are shown in the following table.
Part
Typical
Purpose
Remarks
C1, C2, C3
25 V/2.2
μF
Bootstrap capacitor
(Note 1)
R1
0.62
Ω ± 1 % (1 W)
Current detection
(Note 2)
C4
25 V/1000 pF
± 5 %
PWM frequency setup
(Note 3)
R2
27 k
Ω ± 5 %
PWM frequency setup
(Note 3)
C5
25 V/10
μF
Control power supply stability
(Note 4)
C6
25 V/0.1
μF
VREG power supply stability
(Note 4)
R3
5.1 k
Ω
FG pin pull-up resistor
(Note 5)
Note 1: The required bootstrap capacitance value varies according to the motor drive conditions. Although the IC
can operate at above the VBS undervoltage level, it is however recommended that the capacitor voltage be
greater than or equal to 13.5 V to keep the power dissipation small. The capacitor is biased by VCC and
must be sufficiently derated accordingly.
Note 2: The following formula shows the detection current: IO = VR ÷ R1 (VR = 0.5 V typ.)
Do not exceed a detection current of 1 A when using the IC.
Note 3: With the combination of C4 and R2 shown in the table, the PWM frequency is around 20 kHz. The IC
intrinsic error factor is around 10 %.
The PWM frequency is broadly expressed by the following formula. (In this case, the stray capacitance of
the printed circuit board needs to be considered.)
fc = 0.65 ÷ { C4 × (R2 + 4.25 kΩ)} [Hz]
R2 creates the reference current of the PWM triangular wave charge/discharge circuit. If R2 is set too small
it exceeds the current capacity of the IC internal circuits and the triangular wave distorts. Set R2 to at least 9
k
Ω.
Note 4: When using the IC, adjustment is required in accordance with the use environment. When mounting, place
as close to the base of the IC leads as possible to improve noise elimination.
Note 5: The FG pin is open drain. If the FG pin is not used, connect to the GND.
Note 6: If noise is detected on the Input signal pin, add a capacitor between inputs.
Note 7: A Hall device should use an indium antimony system. It recommend that the peak Hall device voltage
should set more than 300mV.
Handling precautions
(1)
When switching the power supply to the circuit on/off, ensure that VS < VVSOFF (all IGBT outputs
off). At that time, either the VCC or the VBB can be turned on/off first. Note that if the power supply is
switched off as described above, the IC may be destroyed if the current regeneration route to the VBB
power supply is blocked when the VBB line is disconnected by a relay or similar while the motor is
still running.
(2)
The triangular wave oscillator circuit, with externally connected C4 and R2, charges and discharges
minute amounts of current. Therefore, subjecting the IC to noise when mounting it on the board may
distort the triangular wave or cause malfunction. To avoid this, attach external parts to the base of
the IC leads or isolate them from any tracks or wiring which carries large current.
(3)
The PWM of this IC is controlled by the on/off state of the high-side IGBT.
(4)
If a motor is locked where VBB voltage is low and duty is 100 %, it may not be possible to reboot after
the load is released as a result of the high side being ON immediately prior to the motor being locked.
This is because, over time, the bootstrap voltage falls, the high-side voltage decrease protection
operates and the high-side output becomes OFF. In this case, since the level shift pulse necessary to
turn the high side ON cannot be generated, reboot is not possible. A level shift pulse is generated by
either the edge of a Hall sensor output or the edge of an internal PWM signal, but neither edge is
available due to the motor lock and duty 100 % command. In order to reboot after a lock, the high-side
power voltage must return to a level 0.5 V (typ.) higher than the voltage decrease protection level, and
a high-side input signal must be introduced. As a high-side input signal is created by the
aforementioned level shift pulse, it is possible to reboot by reducing PWM duty to less than 100 % or
by forcing the motor to turn externally and creating an edge at a Hall sensor output. In order to
ensure reboot after a system lock, the motor specification must be such that maximum duty is less
than 100 %.


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