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AD202JN датащи(PDF) 5 Page - Analog Devices |
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AD202JN датащи(HTML) 5 Page - Analog Devices |
5 / 12 page AD202/AD204 REV. B –5– The “noninverting” circuit of Figures 5 and 6 can also be used to advantage when a signal inversion is needed: just interchange either the input leads or the output leads to get inversion. This approach retains the high input resistance of the “noninverting” circuit, and at unity gain no gain-setting resistors are needed. When the isolator is not powered, a negative input voltage of more than about 2 V will cause an input current to flow. If the signal source can supply more than a few mA under such condi- tions, the 2 k Ω resistor shown in series with IN+ should be used to limit current to a safe value. This is particularly important with the AD202, which may not start if a large input current is present. Figure 7 shows how to accommodate current inputs or sum cur- rents or voltages. This circuit can also be used when the input signal is larger than the ±5 V input range of the isolator; for example, a ±50 V input span can be accommodated with R F = 20 k and RS = 200 k. Once again, a capacitor from FB to IN COM is required for gains above five. Figure 7. Connections for Summing or Current Inputs Adjustments. When gain and zero adjustments are needed, the circuit details will depend on whether adjustments are to be made at the isolator input or output, and (for input adjust- ments) on the input circuit used. Adjustments are usually best done on the input side, because it is better to null the zero ahead of the gain, and because gain adjustment is most easily done as part of the gain-setting network. Input adjustments are also to be preferred when the pots will be near the input end of the isolator (to minimize common-mode strays). Adjustments on the output side might be used if pots on the input side would represent a hazard due to the presence of large common-mode voltages during adjustment. Figure 8a shows the input-side adjustment connections for use with the “noninverting” connection of the input amplifier. The zero adjustment circuit injects a small adjustment voltage in series with the low side of the signal source. (This will not work if the source has another current path to input common or if current flows in the signal source LO lead). Since the adjust- ment voltage is injected ahead of the gain, the values shown will (Circuit figures shown on this page are for SIP style pack- ages. Refer to Page 3 for proper DIP package pinout.) AD204s are operated from a single AD246, an external bypass capacitor should be used with a value of at least 1 µF for every five isolators used. Place the capacitor as close as possible to the clock driver. Figure 4. Clock Driver Input Configurations. The AD202 and AD204 have been de- signed to be very easy to use in a wide range of applications. The basic connection for standard unity gain applications, useful for signals up to ±5 V, is shown in Figure 5; some of the possible variations are described below. When smaller signals must be Figure 5. Basic Unity-Gain Application handled, Figure 6 shows how to get gain while preserving a very high input resistance. The value of feedback resistor RF should be kept above 20 k Ω for best results. Whenever a gain of more than five is taken, a 100 pF capacitor from FB to IN COM is required. At lower gains this capacitor is unnecessary, but it will not adversely affect performance if used. Figure 6. Input Connections for Gain > 1 |
Аналогичный номер детали - AD202JN |
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Аналогичное описание - AD202JN |
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