AD7827

–9–

REV. 0

OPERATING MODES

The AD7827 has two possible modes of operation depending on

the state of the

CONVST pulse at the end of a conversion.

Mode 1 Operation (High Speed Sampling)

When the AD7827 is operated in Mode 1 the device is not

powered down between conversions. This mode of operation

allows high throughput rates to be achieved. Figure 13 shows

how this optimum throughput rate is achieved by bringing

CONVST high before the end of the conversion. When operat-

ing in this mode, a new conversion should not be initiated until

30 ns after the end of a read operation. This is to allow the

track/hold to acquire the analog signal to 0.5 LSB accuracy.

Mode 2 Operation (Automatic Power-Down)

When the AD7827 is operated in Mode 2 (see Figure 14) it

automatically powers down 530 ns after the falling edge of

CONVST. The CONVST signal is brought low to initiate a

conversion and is left logic low until 530 ns has elapsed after the

falling edge of the

CONVST pulse, i.e., before Point A or Point

B in Figure 14, depending on the actual value of t

Characteristics). The state of the

CONVST signal is sampled at

this point (i.e., 530 ns after

CONVST falling edge) and the

AD7827 will power down as long as the

CONVST is low. The

ADC is powered up again on the rising edge of the

CONVST

signal. The

CONVST pulse width does not have to be as long as

the power-up time if an external reference is used (see Power-Up

Times section). Superior power performance can be achieved in

this mode of operation by powering up the AD7827 to only

carry out a conversion. The serial interface of the AD7827 is

still fully operational while the device is powered down.

CURRENT CONVERSION

RESULT

CONVST

RFS

SCLK

Figure 13. Mode 1 Operation Timing Diagram

CURRENT CONVERSION

RESULT

CONVST

RFS

SCLK

A

B

Figure 14. Mode 2 Operation Timing Diagram