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AD7886KP датащи(PDF) 3 Page - Analog Devices |
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AD7886KP датащи(HTML) 3 Page - Analog Devices |
3 / 16 page AD7886 –3– REV. B TIMING CHARACTERISTICS 1 (VDD = +5 V 5%, VSS = –5 V 5%, AGND = DGND = 0 V) Limit at Limit at Limit at TMIN, TMAX TMIN, TMAX TMIN, TMAX Parameter (J, K Versions) (B Version) (T Version) Units Conditions/Comments t1 50 50 50 ns min CONVST Pulse Width 1 1 1 Fs max t2 0 0 0 ns min CS to RD Setup Time t3 0 0 0 ns min CS to RD Hold Time t4 60 60 75 ns min RD Pulse Width t5 100 100 100 ns max CONVST to BUSY Propagation Delay, (CL = 10 pF) t6 57 57 70 ns max Data Access Time After RD t7 3 10 10 10 ns min Bus Relinquish Time After RD 50 50 60 ns max t8 20 20 14 ns min Data Setup Time Prior to BUSY, (CL = 20 pF) 10 10 0 ns min Data Setup Time Prior to BUSY, (CL = 100 pF) t9 3 10 10 10 ns min Bus Relinquish Time After CONVST 100 100 100 ns max t10 0 0 0 ns min CS High to CONVST Low t11 0 0 0 ns min BUSY High to RD Low t12 250 250 250 ns typ BUSY High to CONVST Low, SHA Acquisition Time t13 1.333 1.333 1.333 µs min Sampling Interval tCONV 950 950 950 ns typ Conversion Time 1000 1000 1000 ns max NOTES 1Timing specifications in bold print are 100% production tested. All other times are sample tested at +25 °C to ensure compliance. All input signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2t 6 is measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V. 3t 7 and t9 are derived from the measured time taken by the data outputs to change by 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapo- lated back to remove the effects of charging or discharging the load capacitor, CL. This means that the times, t7 and t9, quoted in the timing characteristics are the true bus relinquish times of the part and as such are independent of external bus loading capacitances. Specifications subject to change without notice. WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7886 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. TO OUTPUT PIN +2.1V IOH I OL C L Figure 1. Load Circuit for Bus Access and Relinquish Time ABSOLUTE MAXIMUM RATINGS 1, 2 (TA= +25 °C unless otherwise noted) VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V VSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –7 V AGND to DGND . . . . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V VIN1, VIN2, SUM, +5REF to AGND . . . . . . –15 V to +15 V VREF to AGND . . . . . . . . . . . . . . . . VSS –0.3 V to VDD +0.3 V Digital Inputs to DGND CS, RD, CONVST . . . . . . . . . . . . . . –0.3 V to VDD +0.3 V Digital Outputs to DGND DB0 to DB11, BUSY . . . . . . . . . . . . . –0.3 V to VDD +0.3 V Operating Temperature Range Commercial (J, K Versions) . . . . . . . . . . . . . . 0 °C to +70°C Industrial (B Version) . . . . . . . . . . . . . . . . –40 °C to +85°C Extended (T Version) . . . . . . . . . . . . . . . –55 °C to +125°C Storage Temperature Range . . . . . . . . . . . . –65 °C to + 150°C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300 °C Power Dissipation (Any Package) to +75 °C . . . . . . 1000 mW Derates above +75 °C by . . . . . . . . . . . . . . . . . . . . 10 mW/°C NOTES 1Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2If V SS is open circuited with VDD and AGND applied, the VSS pin will be pulled positive, exceeding the Absolute Maximum Ratings. If this possibility exists, a Schottky diode from VSS to DGND (cathode end to GND) ensures that the |
Аналогичный номер детали - AD7886KP |
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Аналогичное описание - AD7886KP |
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