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DAC16FP датащи(PDF) 4 Page - Analog Devices

номер детали DAC16FP
подробное описание детали  16-Bit High Speed Current-Output DAC
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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DAC16FP датащи(HTML) 4 Page - Analog Devices

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DAC16
REV. B
–4–
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
NC
10k
+5V
–15V
Figure 2. Burn-In Diagram
OPERATION
Novel DAC Architecture
The DAC16 was designed with a compound DAC architecture
to achieve high accuracy, excellent linearity, and low transition
errors. As shown in Figure 3, the DAC’s five most-significant
bits utilize 31 identical segmented current sources to obtain
optimal high speed settling at major code transitions. The lower
nine bits utilize an inverted R-2R ladder network which is laser-
trimmed to ensure excellent differential nonlinearity. The middle
two bits (DB9 and DB10) arc binary-weighted and scaled from
the MSB segments. Note that the flow of output current is into
the DAC16—there is no signal inversion. As shown, the switches
for each current source are essentially diodes. It is for this rea-
son that the output voltage compliance of the DAC16 is limited
to a few millivolts. The DAC16 was designed to operate with an
operational amplifier configured as an I–V converter; therefore,
the DAC16’s output must be connected to the sum node of an
operational amplifier for proper operation. Exceeding the output
voltage compliance of the DAC16 will introduce linearity errors.
The reference current buffer assures full accuracy and fast set-
tling by controlling the MSB reference node. The 16-bit paral-
lel digital input is TTL/CMOS compatible and unbuffered,
minimizing the deleterious effects of digital feedthrough
while allowing the user to tailor the digital interface to
the speed requirements and bus configuration of the
application.
Equivalent Circuit Analysis
An equivalent circuit for static operation of the DAC16 is
illustrated in Figure 4. IREF is the current applied to the
DAC16 and is set externally to the device by VREF and
RREF. The output capacitance of the DAC16 is approxi-
mately 10 pF and is code independent. Its output resis-
tance RO is code dependent and is given by:
1
R
O
= 1
8
k
Ω +
DB9
288
k
Ω +
DB10
144
k
Ω +
X
72
k
where
DB9 = State of Data Bit 9 = 0 or 1;
DB10 = State of Data Bit 10 = 0 or 1; and
X = Decimal representation of the 5 MSBs (DB11–DB15)
= 0 to 31.
IDAC
RO
CO
IOUT
IOUT = 8 • IREF
RO = SEE TEXT
CO = 10pF
65,535 Digital Code
65,536
Figure 4. Equivalent Circuit for the DAC16
Table I provides the relationship between the input digital
code and the output resistance of the DAC16.
Table I. DAC16 Output Resistance vs. Digital Code
Hex Digital Code
Scale
Output Resistance
FFFF
Zero
8 k
BFFF
1/4
4.2 k
7FFF
1/2
2.9 k
3FFF
3/4
2.2 k
0
Full – 1 LSB
1.8 k
+5V
DB0 – DB15
SWITCH DETAIL
FROM
SWITCH
DECODER
4k
4k
8k
8k
DB0 – DB8
4k
4k
4k
SW10
SW9
SW8
SW7
SW6
SW0
SW
SW
SW
SW
18k
31 CURRENT SOURCES
125 A EACH
DB11 – DB15
DB10
DB9
9 CURRENT SOURCES
15.63 A EACH
IREF
IOUT
AGND
CCOMP
62.5 A 31.25 A
Figure 3. DAC16 Architecture


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