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AD5687RBCPZ-RL7 датащи(PDF) 4 Page - Analog Devices

номер детали AD5687RBCPZ-RL7
подробное описание детали  Dual, 16-/12-Bit nanoDAC with 2 ppm/째C Reference, SPI Interface
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD5687RBCPZ-RL7 датащи(HTML) 4 Page - Analog Devices

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AD5689R/AD5687R
Data Sheet
Rev. 0 | Page 4 of 28
A Grade1
B Grade1
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
REFERENCE OUTPUT
Output Voltage7
2.4975
2.5025
2.4975
2.5025
V
At ambient
Reference Temperature
Coefficient8, 9
5
20
2
5
ppm/°C
See the Terminology section
Output Impedance3
0.04
0.04
Output Voltage Noise3
12
12
µV p-p
0.1 Hz to 10 Hz
Output Voltage Noise
Density3
240
240
nV/√Hz
At ambient; f = 10 kHz,
CL = 10
nF
Load Regulation Sourcing3
20
20
µV/mA
At ambient
Load Regulation Sinking3
40
40
µV/mA
At ambient
Output Current Load
Capability3
±5
±5
mA
VDD ≥ 3 V
Line Regulation3
100
100
µV/V
At ambient
Long-Term Stability/Drift3
12
12
ppm
After 1000 hours at 125°C
Thermal Hysteresis3
125
125
ppm
First cycle
25
25
ppm
Additional cycles
LOGIC INPUTS3
Input Current
±2
±2
µA
Per pin
Input Low Voltage (VINL)
0.3 × VLOGIC
0.3 × VLOGIC
V
Input High Voltage (VINH)
0.7 × VLOGIC
0.7 × VLOGIC
V
Pin Capacitance
2
2
pF
LOGIC OUTPUTS (SDO)3
Output Low Voltage (VOL)
0.4
0.4
V
ISINK = 200
μA
Output High Voltage (VOH)
VLOGIC − 0.4
VLOGIC − 0.4
V
ISOURCE = 200
μA
Floating State Output
Capacitance
4
4
pF
POWER REQUIREMENTS
VLOGIC
1.8
5.5
1.8
5.5
V
ILOGIC
3
3
µA
VDD
2.7
5.5
2.7
5.5
V
Gain = 1
VDD
VREF + 1.5
5.5
VREF + 1.5
5.5
V
Gain = 2
IDD
VIH = VDD, VIL = GND,
VDD = 2.7 V to 5.5 V
Normal Mode10
0.59
0.7
0.59
0.7
mA
Internal reference off
1.1
1.3
1.1
1.3
mA
Internal reference on,
at full scale
All Power-Down
Modes11
1
4
1
4
µA
−40°C to +85°C
6
6
µA
−40°C to +105°C
1
Temperature range for A and B grades: −40°C to +105°C.
2
DC specifications tested with the outputs unloaded, unless otherwise noted. Upper dead band = 10 mV; it exists only when VREF = VDD with gain = 1 or when
VREF/2 = VDD with gain = 2. Linearity is calculated using a reduced code range of 256 to 65,280 (AD5689R) and 12 to 4080 (AD5687R).
3
Guaranteed by design and characterization; not production tested.
4
Channel A can have an output current of up to 30 mA. Similarly, Channel B can have an output current of up to 30 mA, up to a junction temperature of 110°C.
5
VDD = 5 V. The devices include current limiting that is intended to protect them during temporary overload conditions. Junction temperature may be exceeded
during current limit, but operation above the specified maximum operation junction temperature can impair device reliability.
6
When drawing a load current at either rail, the output voltage headroom, with respect to that rail, is limited by the 25 Ω typical channel resistance of the output
devices. For example, when sinking 1 mA, the minimum output voltage = 25 Ω × 1 mA = 25 mV (see Figure 32).
7
Initial accuracy presolder reflow is ±750 µV; output voltage includes the effects of preconditioning drift. See the Internal Reference Setup section.
8
Reference is trimmed and tested at two temperatures and is characterized from −40°C to +105°C.
9
Reference temperature coefficient is calculated as per the box method. See the Terminology section for more information.
10
Interface inactive. Both DACs active. DAC outputs unloaded.
11
Both DACs powered down.


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