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74LVQ125SJ датащи(PDF) 1 Page - Fairchild Semiconductor |
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74LVQ125SJ датащи(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page 74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs General Description The LVQ125 contains four independent non-inverting buffers with 3-STATE outputs. Features n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance n Guaranteed incident wave switching into 75 Ω Ordering Code: Order Number Package Number Package Description 74LVQ125SC M14A 14-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC 74LVQ125SJ M14D 14-Lead Small Outline Package, SOIC EIAJ Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description A n,Bn Inputs O n Outputs Connection Diagram Truth Table Inputs Output A n B n O n LL L LH H HX Z H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial IEEE/IEC DS011349-1 Pin Assignment for SOIC JEDEC and EIAJ DS011349-2 May 1998 © 1998 Fairchild Semiconductor Corporation DS011349 www.fairchildsemi.com |
Аналогичный номер детали - 74LVQ125SJ |
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Аналогичное описание - 74LVQ125SJ |
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