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DM74LS90 датащи(PDF) 4 Page - Fairchild Semiconductor |
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DM74LS90 датащи(HTML) 4 Page - Fairchild Semiconductor |
4 / 6 page www.fairchildsemi.com 4 Electrical Characteristics (Continued) Note 8: QA outputs are tested at IOL = Max plus the limit value of IIL for the B input. This permits driving the B input while maintaining full fan-out capability. Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 10: ICC is measured with all outputs open, both RO inputs grounded following momentary connection to 4.5V and all other inputs grounded. Switching Characteristics at V CC = 5V and TA = 25°C From (Input) RL = 2 kΩ Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units Min Max Min Max fMAX Maximum Clock A to QA 32 20 MHz Frequency B to QB 16 10 tPLH Propagation Delay Time A to QA 16 20 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time A to QA 18 24 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time A to QD 48 52 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time A to QD 50 60 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QB 16 23 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QB 21 30 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QC 32 37 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QC 35 44 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time B to QD 32 36 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time B to QD 35 44 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time SET-9 to QA, QD 30 35 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time SET-9 to QB, QC 40 48 ns HIGH-to-LOW Level Output tPHL Propagation Delay Time SET-0 to Any Q 40 52 ns HIGH-to-LOW Level Output |
Аналогичный номер детали - DM74LS90 |
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Аналогичное описание - DM74LS90 |
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