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FDS8928A датащи(PDF) 1 Page - Fairchild Semiconductor

номер детали FDS8928A
подробное описание детали  Dual N & P-Channel Enhancement Mode Field Effect Transistor
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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July 1998
FDS8928A
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
Absolute Maximum Ratings T
A = 25°C unless otherwise noted
Symbol
Parameter
N-Channel
P-Channel
Units
V
DSS
Drain-Source Voltage
30
-20
V
V
GSS
Gate-Source Voltage
8
-8
V
I
D
Drain Current - Continuous
(Note 1a)
5.5
-4
A
- Pulsed
20
-20
P
D
Power Dissipation for Dual Operation
2
W
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
0.9
T
J,TSTG
Operating and Storage Temperature Range
-55 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
78
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
40
°C/W
FDS8928A Rev. B
SOIC-16
SOT-23
SuperSOT
TM-8
SO-8
SOT-223
SuperSOT
TM-6
These dual N- and P -Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state
resistance
and
provide
superior
switching
performance. These devices are particularly suited for low
voltage applications such as notebook computer power
management and other battery powered circuits where fast
switching, low in-line power loss, and resistance
to
transients are needed.
N-Channel 5.5 A,30 V, R
DS(ON)=0.030 @ VGS=4.5 V
R
DS(ON)=0.038 @ VGS=2.5 V.
P-Channel -4 A,-20 V, R
DS(ON)=0.055 @ VGS=-4.5 V
R
DS(ON)=0.072 @ VGS=-2.5 V.
High density cell design for extremely low R
DS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
S1
D1
S2
G1
SO-8
D2
D2
D1
G2
FDS
8928A
pin 1
3
5
7
8
2
1
4
1
6
© 1998 Fairchild Semiconductor Corporation


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