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LM3674MF-2.8 датащи(PDF) 11 Page - Texas Instruments

номер детали LM3674MF-2.8
подробное описание детали  LM3674 2MHz, 600mA Step-Down DC-DC Converter in SOT-23
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LM3674MF-2.8 датащи(HTML) 11 Page - Texas Instruments

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VOUT
TIME (200 ns/DIV)
200 mA/DIV
IL
VSW
2V/DIV
10 mV/DIV
AC Coupled
VIN = 3.6V
VOUT = 1.5V
IOUT = 400 mA
LM3674
www.ti.com
SNVS405F – DECEMBER 2005 – REVISED MAY 2013
Internal Synchronous Rectification
While in PWM mode, the LM3674 uses an internal NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rectification provides a significant improvement in
efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier
diode.
Current Limiting
A current limit feature allows the LM3674 to protect itself and external components during overload conditions.
PWM mode implements current limiting using an internal comparator that trips at 1020 mA (typ). If the output is
shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration
until the inductor current falls below a low threshold, ensuring inductor current has more time to decay, thereby
preventing runaway.
SOFT-START
The LM3674 has a soft-start circuit that limits in-rush current during start-up. During start-up the switch current
limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after Vin reaches
2.7V. Soft start is implemented by increasing switch current limit in steps of 70mA, 140mA, 280mA, and 1020mA
(typ. switch current limit). The start-up time thereby depends on the output capacitor and load current demanded
at start-up. Typical start-up times with 10µF output capacitor and 300mA load current is 350µs and with 10mA
load current is 240µs.
LDO - LOW DROP OUT OPERATION
The LM3674-ADJ can operate at 100% duty cycle (no switching, PMOS switch completely on) for low drop out
support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input
voltage. When the device operates near 100% duty cycle, the output voltage supply ripple is slightly higher,
approximately 25mV.
The minimum input voltage needed to support the output voltage is:
VIN,MIN = ILOAD * (RDSON (P) + RINDUCTOR) + VOUT
(3)
ILOAD
Load current
RDSON (P)
Drain to source resistance of PFET switch in the triode region
RINDUCTOR
Inductor resistance
APPLICATION INFORMATION
OUTPUT VOLTAGE SELECTION FOR ADJUSTABLE (LM3674-ADJ)
The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT
to FB then to GND. VOUT will be adjusted to make FB equal to 0.5V. The resistor from FB to GND (R2) should be
200 k
Ω to keep the current drawn through this network small but large enough that it is not susceptible to noise.
If R2 is 200KΩ, and given the VFB is 0.5V, then the current through the resistor feedback network will be 2.5µA.
The output voltage formula is:
Copyright © 2005–2013, Texas Instruments Incorporated
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