поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

TLC2574IPW датащи(PDF) 4 Page - Texas Instruments

Click here to check the latest version.
номер детали TLC2574IPW
подробное описание детали  5-V ANALOG,3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WIRH 10-V INPUTS
Download  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

TLC2574IPW датащи(HTML) 4 Page - Texas Instruments

  TLC2574IPW Datasheet HTML 1Page - Texas Instruments TLC2574IPW Datasheet HTML 2Page - Texas Instruments TLC2574IPW Datasheet HTML 3Page - Texas Instruments TLC2574IPW Datasheet HTML 4Page - Texas Instruments TLC2574IPW Datasheet HTML 5Page - Texas Instruments TLC2574IPW Datasheet HTML 6Page - Texas Instruments TLC2574IPW Datasheet HTML 7Page - Texas Instruments TLC2574IPW Datasheet HTML 8Page - Texas Instruments TLC2574IPW Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 49 page
background image
TLC3574, TLC3578, TLC2574, TLC2578
5V ANALOG, 3/5V DIGITAL, 14/12BIT, 200KSPS, 4/8CHANNEL
SERIAL ANALOGTODIGITAL CONVERTERS WITH ±10V INPUTS
SLAS262C − OCTOBER 2000 − REVISED MAY 2003
4
WWW.TI.COM
Terminal Functions (Continued)
TERMINAL
NO.
I/O
DESCRIPTION
NAME
TLC3574
TLC2574
TLC3578
TLC2578
I/O
DESCRIPTION
EOC(INT)
4
4
O
End of conversion (EOC) or interrupt to host processor (INT)
EOC: used in conversion mode 00 only. EOC goes from high to low at the end of the sampling and
remains low until the conversion is complete and data is ready.
INT: Interrupt to the host processor. The falling edge of INT indicates data is ready for output. INT
is cleared by the following CS
↓, FS↑, or CSTART↓.
FS
2
2
I
Frame sync input from DSP. The rising edge of FS indicates the start of a serial data frame being
transferred (coming into or being sent out of the device). If FS is low at the falling edge of CS, the
rising edge of FS initiates the operation cycle, resets the internal 4-bit counter, and enables SDI,
SDO, and SCLK. Tie this pin to DVDD if FS is not used to initiate the operation cycle.
REFM
16
20
I
External low reference input. Connect REFM to AGND.
REFP
15
19
I
External positive reference input. The range of maximum input voltage is determined by the
difference between the voltage applied to this terminal and to the REFM terminal. Always install
decoupling capacitors (10
µF in parallel with 0.1 µF) between REFP and REFM.
SCLK
1
1
I
Serial clock input from the host processor to clock in the input from SDI and clock out the output
via SDO. It can also be used as the conversion clock source when the external conversion clock
is selected (see Table 2). When CS is low, SCLK is enabled. When CS is high, SCLK is disabled
for the data transfer, but can still work as the conversion clock source.
SDI
3
3
I
Serial data input. The first 4 MSBs, ID[15:12], are decoded as one 4-bit command. All trailing bits,
except for the WRITE CFR command, are filled with zeros. The WRITE CFR command requires
additional 12-bit data. The MSB of input data, ID(15), is latched at the first falling edge of SCLK
following FS falling edge if FS starts the operation, or latched at the falling edge of first SCLK
following CS falling edge when CS initiates the operation.
The remaining input data (if any) is shifted in on the rising edge of SCLK and latched on the falling
edge of SCLK. The input via SDI is ignored after the 4-bit counter counts to 16 (clock edges) or a
low-to-high transition of CS, whichever happens first. Refer to the timing specification for the timing
requirements. Tie SDI to DVDD if using hardware default mode (refer to Device Initialization).
SDO
5
5
O
The 3-state serial output for the A/D conversion result. All data bits are shifted out through SDO.
SDO is in the high-impedance state when CS is high. SDO is released after a CS falling edge. The
output format is MSB (OD15) first.
When FS initiates the operation, the MSB of output via SDO, OD(15), is valid before the first falling
edge of SCLK following the falling edge of FS.
When CS initiates the operation, the MSB, OD(15), is valid before the first falling edge of SCLK
following the CS falling edge.
The remaining data bits (if any) are shifted out on the rising edge of SCLK and are valid before the
falling edge of SCLK. Refer to the timing specification for the details.
In select/conversion operation, the first 14 bits (for TLC3574/78) or the first 12 bits (for TLC2574/78)
are the results from the previous conversion (data). In a READ FIFO operation, this data is from
FIFO. In both cases, the last two bits (for TLC3574/78) or the last four bits (for TLC2574/78) are
don’t care.
In a WRITE operation, the output from SDO must be ignored.
SDO goes into high-impedance state at the 16th falling edge of SCLK after the operation cycle is
initiated. SDO is in high-impedance state during conversions in modes 01, 10, and 11.


Аналогичный номер детали - TLC2574IPW

производительномер деталидатащиподробное описание детали
logo
Texas Instruments
TLC2574IPW TI-TLC2574IPW Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG 3-5V DIGITAL 14-12BIT 200-KSPS 4-8CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH
TLC2574IPWG4 TI-TLC2574IPWG4 Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG 3-5V DIGITAL 14-12BIT 200-KSPS 4-8CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH
More results

Аналогичное описание - TLC2574IPW

производительномер деталидатащиподробное описание детали
logo
Texas Instruments
TLC2574 TI-TLC2574 Datasheet
706Kb / 39P
[Old version datasheet]   5-V ANALOG 3-/5-V DIGITAL 14-/12-BIT 200-KSPS 4-/8-CHANNEL SERIAL ANALOG TO DIGITAL CONVERTERS WITH 10-V INPUTS
TLC3574IDW TI-TLC3574IDW Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG,3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 10-V INPUTS
TLC3544 TI-TLC3544 Datasheet
790Kb / 40P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC3544 TI-TLC3544_07 Datasheet
926Kb / 42P
[Old version datasheet]   5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
TLC2578IDWR TI-TLC2578IDWR Datasheet
1Mb / 49P
[Old version datasheet]   5-V ANALOG 3-5V DIGITAL 14-12BIT 200-KSPS 4-8CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH
TLC3541 TI-TLC3541 Datasheet
481Kb / 23P
[Old version datasheet]   5-V. LOW POWER, 14-BIT, 200-KSPS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO-POWER DOWN
TLV2544Q TI1-TLV2544Q Datasheet
623Kb / 37P
[Old version datasheet]   3-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN
TLV2544Q TI-TLV2544Q_07 Datasheet
863Kb / 41P
[Old version datasheet]   3-V TO 5.5-V, 12-BIT, 200-KSPS, 4-/8-CHANNEL, LOW-POWER SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER-DOWN
TLC2554 TI-TLC2554 Datasheet
566Kb / 37P
[Old version datasheet]   5-V, 12-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN
TLC2554 TI1-TLC2554_14 Datasheet
1Mb / 50P
[Old version datasheet]   5-V, 12-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com