TPS2300

TPS2301

SLVS265H – FEBRUARY 2000 – REVISED JULY 2013

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PWRGD1, PWRGD2 – PWRGD1 and PWRGD2 signal the presence of undervoltage conditions on VSENSE1

and VSENSE2, respectively. These pins are open-drain outputs and are pulled low during an undervoltage

condition. To minimize erroneous PWRGDx responses from transients on the voltage rail, the voltage sense

circuit incorporates a 20-

μs deglitch filter. When VSENSEx is lower than the reference voltage (about 1.23 V),

PWRGDx is active low to indicate an undervoltage condition on the power-rail voltage. PWRGDx may not

correctly report power conditions when the device is disabled, because there is no gate drive power for the

PWRGD output transistor in the disable mode, or, in other words, PWRGD is floating. Therefore, PWRGD is

pulled up to its pullup power supply rail in disable mode.

TIMER – A capacitor on TIMER sets the time during which the power switch can be in overcurrent before turning

off. When the overcurrent protection circuits sense an excessive current, a current source is enabled which

charges the capacitor on TIMER. Once the voltage on TIMER reaches approximately 0.5 V, the circuit-breaker

latch is set and the power switch is latched off. Power must be recycled or the ENABLE pin must be toggled to

restart the controller. In high-power or high-temperature applications, a minimum 50-pF capacitor is strongly

recommended from TIMER to ground, to prevent any false triggering.

VREG – VREG is the output of an internal low-dropout voltage regulator, where IN1 is the input. The regulator is

used to generate a regulated voltage source, less than 5.5 V, for the device. A 0.1-

μF ceramic capacitor should

be connected between VREG and ground to aid in noise rejection. In this configuration, upon disabling the

device, the internal low-dropout regulator will also be disabled, which removes power from the internal circuitry

and allows the device to be placed in low-quiescent-current mode. In applications where IN1 is less than 5.5 V,

VREG and IN1 may be connected together. However, under these conditions, disabling the device does not

place the device in low-quiescent-current mode, because the internal low-dropout voltage regulator is being

bypassed, thereby keeping internal circuitry operational. If VREG and IN1 are connected together, a 0.1-

μF

ceramic capacitor between VREG and ground is not needed if IN1 already has a bypass capacitor of 1

μF to

10

μF.

VSENSE1, VSENSE2 – VSENSE1 and VSENSE2 can be used to detect undervoltage conditions on external

circuitry. If VSENSE1 senses a voltage below approximately 1.23 V, PWRGD1 is pulled low. Similarly, a voltage

less than 1.23 V on VSENSE2 causes PWRGD2 to be pulled low.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range (unless otherwise noted)

(1) (2)

VALUE

UNIT

–0.3 to 15

V

Input voltage range

–0.3 to 7

V

–0.3 to 30

V

Output voltage range

–0.3 to 22

V

–0.3 to 15

V

0 to 100

mA

Sink current range

0 to 10

mA

–40 to 100

°C

–55 to 150

°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

260

°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltages are respect to DGND.

DISSIPATION RATING TABLE

DERATING FACTOR

PACKAGE

POWER RATING

POWER RATING

POWER RATING

PW-20

1015 mW

13.55 mW/°C

406 mW

203 mW

4

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