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74AUP1G02GS датащи(PDF) 10 Page - NXP Semiconductors

номер детали 74AUP1G02GS
подробное описание детали  Low-power 2-input NOR gate
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AUP1G02GS датащи(HTML) 10 Page - NXP Semiconductors

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74AUP1G02
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 6 — 27 June 2012
10 of 21
NXP Semiconductors
74AUP1G02
Low-power 2-input NOR gate
[1]
tpd is the same as tPLH and tPHL.
12. Waveforms
CL = 15 pF
tpd
propagation delay
A, B to Y; see Figure 8
[1]
VCC = 1.1 V to 1.3 V
3.1
16.4
3.1
18.1
ns
VCC = 1.4 V to 1.6 V
2.0
10.4
2.0
11.5
ns
VCC = 1.65 V to 1.95 V
1.7
8.3
1.7
9.2
ns
VCC = 2.3 V to 2.7 V
1.5
6.3
1.5
7.0
ns
VCC = 3.0 V to 3.6 V
1.4
5.7
1.4
6.3
ns
CL = 30 pF
tpd
propagation delay
A, B to Y; see Figure 8
[1]
VCC = 1.1 V to 1.3 V
4.1
22.4
4.1
24.7
ns
VCC = 1.4 V to 1.6 V
2.9
13.9
2.9
15.3
ns
VCC = 1.65 V to 1.95 V
2.3
11.1
2.3
12.3
ns
VCC = 2.3 V to 2.7 V
2.1
8.5
2.1
9.4
ns
VCC = 3.0 V to 3.6 V
2.1
7.7
2.1
8.5
ns
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9
Symbol
Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C
Unit
Min
Max
Min
Max
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 8.
The data input (A or B) to output (Y) propagation delays
mna612
tPHL
tPLH
VM
VM
A, B input
Y output
GND
VI
VOH
VOL
Table 10.
Measurement points
Supply voltage
Output
Input
VCC
VM
VM
VI
tr = tf
0.8 V to 3.6 V
0.5
× VCC
0.5
× VCC
VCC
≤ 3.0 ns


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