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DAC813 датащи(PDF) 9 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation. Click here to check the latest version.
номер детали DAC813
подробное описание детали  Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER
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производитель  BURR-BROWN [Burr-Brown (TI)]
домашняя страница  http://www.burr-brown.com
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DAC813 датащи(HTML) 9 Page - Burr-Brown (TI)

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9
®
DAC813
FIGURE 5. Power Supply, Gain, and Offset Connections.
200
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1k
V
OUT
3M
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1k
V
OUT
–V
CC
10k
to
100k
BIPOLAR
UNIPOLAR
(2)
(1) 10µF tantalum for
optimum settling
performance.
(2) Unipolar offset is
not necessary in most
applications and can
lead to noise pickup.
(3) Note that for the
ceramic package
the lid is connected
to –V
++
0.01µF
0.01µF
+V
CC
CC .
L
REF OUT
REF IN
CC
OUT
CC
V
20V Range
20V Range
BPO
ACOM
V
V
+V
V
–V
WR
LDAC
Reset
LMSB
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DCOM
LLSB
(1)
0.01µF
(1)
0.01µF
0.01µF
L
REF OUT
REF IN
CC
OUT
CC
V
20V Range
20V Range
BPO
ACOM
V
V
+V
V
–V
WR
LDAC
Reset
LMSB
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DCOM
LLSB
+V
CC
+V
CC
–V
CC
(3)
–V
CC
(3)
DAC813 features separate digital and analog power supply
returns to permit optimum connections for low noise and
high speed performance. It is recommended that both Ana-
log Common (ACOM, Pin 5) and Digital Common (DCOM,
Pin 16) be connected directly to a ground plane under the
package. If a ground plane is not used, connect the ACOM
and DCOM pins together close to the package. Since the
reference point for VOUT and VREF OUT is the ACOM pin, it
is also important to connect the load directly to the ACOM
pin. Refer to Figure 5.
The change in current in the Analog Common pin (ACOM,
Pin 5) due to an input data word change from 000HEX to
FFFHEX is only 800µA.
OUTPUT RANGE CONNECTIONS
Internal scaling resistors provided in the DAC813 may be
connected to produce bipolar output voltage ranges of
±10V
and
±5V or unipolar output voltage range of 0 to +10V.
Refer to Figure 6.
The internal feedback resistors (25k
Ω) and the bipolar offset
resistor (24.9k
Ω) are trimmed to an absolute tolerance of
less than
±2%. Therefore, one can change the range by
adding a series resistor in various feedback circuit configu-
rations. For example, a 600
Ω resistor in series with the 20V
range terminal can be used to obtain a 20.48V (
±10.24V)
range (5mV LSB). A 7.98k
Ω resistor in series with the 10V
range connection (20V ranges in parallel) gives a 16.384V
(
±8.192V) bipolar range (4mV LSB). Gain drift will be
affected by the mismatch of the temperature coefficient of
the external resistor with the internal D/A resistors.
APPLICATIONS
MICROCOMPUTER BUS INTERFACING
The DAC813 interface logic allows easy interface to micro-
computer bus structures. The control signal is derived from
external device select logic and the I/O Write or Memory
Write (depending upon the system design) signals from the
microcomputer.
The latch enable lines LMSB, LLSB, and LDAC determine
which of the latches are selected. It is permissible to enable
two or more latches simultaneously, as shown in some of the
following examples.
The double-buffered latch permits data to be loaded into the
input latches of several DAC813s and later strobed into the
D/A latch of all D/As, simultaneously updating all analog
outputs. All the interface schemes shown below use a base
address decoder. If blocks of memory are used, the base
address decoder can be simplified or eliminated altogether.
8-BIT INTERFACE
The control logic of DAC813 permits interfacing to right-
justified data formats, illustrated in Figure 7. When a 12-bit
D/A converter is loaded from an 8-bit bus, two bytes of data
are required. Figure 8 illustrates an addressing scheme for
right-justified data. The base address is decoded from the
high-order address bits. A0 and A1 address the appropriate
latches. Note that adjacent addresses are used. X10HEX loads
the 8 LSBs and X01HEX loads the 4 MSBs and simultane-
ously transfers input latch data to the D/A latch. Addresses
X00HEX and X11HEX are not used.


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