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CSPPT16-900J датащи(PDF) 1 Page - California Micro Devices Corp |
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CSPPT16-900J датащи(HTML) 1 Page - California Micro Devices Corp |
1 / 4 page © 2000 California Micro Devices Corp. All rights reserved. 11/10/2000 1 CSPPT CALIFORNIA MICRO DEVICES 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com Chip Scale Parallel Termination Array Features • 8,16 or 32 integrated high frequency bussed terminations • Ultra small footprint Chip Scale Package • Ceramic substrate • 0.35mm Eutectic Solder Bumps, 0.65mm pitch Product Description The CSPPT is a high performance Integrated Passive Device (IPD) which provides parallel terminations suitable for use in high speed bus applications. Eight (8), sixteen (16), or thirty-two (32) parallel termination versions are provided. These resistors provide excellent high frequency performance in excess of 3GHz and are manufactured to an absolute tolerance as low as ±1%. Applications • Parallel resistive bus termination • Bussed resistor array C1290700 SCHEMATIC DIAGRAMS The Chip Scale Package provides an ultra small footprint for this IPD and provides minimal parasitics compared to conventional packaging. Typical bump inductance is less than 25pH. The large solder bumps and ceramic substrate allow for standard attachment to laminate printed circuit boards without the use of underfill. CSPPT08 CSPPT16 CSPPT32 R1 R1 B A 12 4 R1 R1 R1 R1 3 R1 5 R1 R1 R1 B A 12 4 R1 R1 R1 R1 3 R1 5 R1 R1 R1 D C R1 R1 R1 R1 R1 R1 R1 R1 B A 12 4 R1 R1 R1 R1 3 R1 5 R1 R1 R1 D C R1 R1 R1 R1 R1 R1 R1 R1 67 9 R1 R1 R1 R1 8 R1 10 R1 R1 R1 R1 R1 R1 R1 R1 R1 |
Аналогичный номер детали - CSPPT16-900J |
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Аналогичное описание - CSPPT16-900J |
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