поискавой системы для электроныых деталей |
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CAT28F020 датащи(PDF) 10 Page - Catalyst Semiconductor |
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CAT28F020 датащи(HTML) 10 Page - Catalyst Semiconductor |
10 / 14 page CAT28F020 10 Doc. No. 25037-00 2/98 F-1 Figure 5. Chip Erase Algorithm(1) 5108 FHD F10 Note: (1) The algorithm MUST BE FOLLOWED to ensure proper and reliable operation of the device. DATA = 20H START ERASURE APPLY VPPH INITIALIZE ADDRESS INITIALIZE PLSCNT = 0 WRITE ERASE SETUP COMMAND WRITE ERASE COMMAND TIME OUT 10ms WRITE ERASE VERIFY COMMAND TIME OUT 6 µs READ DATA FROM DEVICE DATA = FFH? LAST ADDRESS? WRITE READ COMMAND APPLY VPPL ERASURE COMPLETED APPLY VPPL ERASE ERROR INCREMENT ADDRESS INC PLSCNT = 3000 ? NO NO NO YES YES YES PROGRAM ALL BYTES TO 00H STANDBY VPP RAMPS TO VPPH (OR VPP HARDWIRED) BUS OPERATION COMMAND COMMENTS READ STANDBY WRITE STANDBY ERASE ERASE VERIFY READ INITIALIZE ADDRESS ALL BYTES SHALL BE PROGRAMMED TO 00 BEFORE AN ERASE OPERATION PLSCNT = PULSE COUNT ACTUAL ERASE NEEDS 10ms PULSE, DATA = 20H WAIT ADDRESS = BYTE TO VERIFY DATA = 20H; STOPS ERASE OPERATION READ BYTE TO VERIFY ERASURE DATA = 00H RESETS THE REGISTER FOR READ OPERATION VPP RAMPS TO VPPL (OR VPP HARDWIRED) WRITE WRITE WRITE ERASE WAIT COMPARE OUTPUT TO FF INCREMENT PULSE COUNT DATA = 20H DATA=20H A0H =1000 ? |
Аналогичный номер детали - CAT28F020 |
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Аналогичное описание - CAT28F020 |
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