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CAT24WC65KA-TE13 датащи(PDF) 1 Page - Catalyst Semiconductor |
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CAT24WC65KA-TE13 датащи(HTML) 1 Page - Catalyst Semiconductor |
1 / 8 page 1 DOUT ACK SENSE AMPS SHIFT REGISTERS CONTROL LOGIC WORD ADDRESS BUFFERS START/STOP LOGIC STATE COUNTERS SLAVE ADDRESS COMPARATORS E2PROM 128/256 X 256 VCC EXTERNAL LOAD COLUMN DECODERS XDEC DATA IN STORAGE HIGH VOLTAGE/ TIMING CONTROL VSS WP SCL A0 A1 A2 SDA 128/256 256 VCC WP SCL SDA 1 2 3 4 8 7 6 5 A0 VCC WP SCL SDA 1 2 3 4 8 7 6 5 A1 A2 VSS A0 A1 A2 VSS DESCRIPTION The CAT24WC33/65 is a 32K/64K-bit Serial CMOS E2PROM internally organized as 4096/8192 words of 8 bits each. Catalyst’s advanced CMOS technology sub- stantially reduces device power requirements. The Preliminary * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. s Zero Standby Current s Commercial, Industrial and Automotive Tem- perature Ranges s Write Protection –Bottom 1/4 Array Protected When WP at V IH s 1,000,000 Program/Erase Cycles s 100 Year Data Retention CAT24WC33/65 features a 32-byte page write buffer. The device operates via the I2C bus serial interface and is available in 8-pin DIP or 8-pin SOIC packages. PIN CONFIGURATION BLOCK DIAGRAM PIN FUNCTIONS Pin Name Function A0, A1, A2 Device Address Inputs SDA Serial Data/Address SCL Serial Clock WP Write Protect VCC +1.8V to +6V Power Supply VSS Ground 24WC33/65 F02 CAT24WC33/65 32K/64K-Bit I2C Serial CMOS E2PROM s 400 KHz I2C Bus Compatible* s 1.8 to 6 Volt Read and Write Operation s Cascadable for up to Eight Devices s 32-Byte Page Write Buffer s Self-Timed Write Cycle with Auto-Clear s 8-Pin DIP or 8-Pin SOIC s Schmitt Trigger Inputs for Noise Protection FEATURES DIP Package (P) SOIC Package (J,K) 24WC33/65 F01 © 1998 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice Doc. No. 25064-00 2/98 S-1 |
Аналогичный номер детали - CAT24WC65KA-TE13 |
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Аналогичное описание - CAT24WC65KA-TE13 |
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