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TSL25911 датащи(PDF) 7 Page - ams AG |
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TSL25911 датащи(HTML) 7 Page - ams AG |
7 / 25 page Datasheet - Apr. 2013 - ams163.5 TSL2591 – 7 The timing characteristics of TSL2591 are given below. Figure TSL2591 – 10: AC Electrical Characteristics, VDD = 3 V, TA = 25ºC (unless otherwise noted) † Specified by design and characterization; not production tested. Figure TSL2591 – 11: Parameter Measurement Information Parameter † Description Min Typ Max Units f(SCL) Clock frequency (I2C only) 0 400 kHz t(BUF) Bus free time between start and stop condition 1.3 μs t(HDSTA) Hold time after (repeated) start condition. After this period, the first clock is generated. 0.6 μs t(SUSTA) Repeated start condition setup time 0.6 μs t(SUSTO) Stop condition setup time 0.6 μs t(HDDAT) Data hold time 0 μs t(SUDAT) Data setup time 100 ns t(LOW) SCL clock low period 1.3 μs t(HIGH) SCL clock high period 0.6 μs tF Clock/data fall time 300 ns tR Clock/data rise time 300 ns Ci Input pin capacitance 10 pF Timing Characteristics Timing Diagrams |
Аналогичный номер детали - TSL25911 |
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Аналогичное описание - TSL25911 |
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