7-1255

CD4555BMS, CD4556BMS

FIGURE 7. TYPICAL PROPAGATION DELAY TIME vs LOAD

CAPACITANCE (A OR B INPUT TO ANY OUTPUT)

FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOAD

CAPACITANCE (E INPUTS TO ANY OUTPUT)

FIGURE 9. TYPICAL PROPAGATION DELAY TIME vs SUPPLY

VOLTAGE

FIGURE 10. TYPICAL TRANSITION TIME vs LOAD CPACI-

TANCE

FIGURE 11. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY

100

50

0

20

40

60

80

100

LOAD CAPACITANCE (CL) (pF)

SUPPLY VOLTAGE (VDD) = 5V

10V

15V

150

200

250

100

50

0

20

40

60

80

100

LOAD CAPACITANCE (CL) (pF)

SUPPLY VOLTAGE (VDD) = 5V

10V

15V

150

200

250

150

50

0

5

10

15

20

SUPPLY VOLTAGE (VDD) = 5V

ANY INPUT

E INPUT

100

200

250

300

LOAD CAPACITANCE (CL) (pF)

0

40

60

80

100

20

0

50

100

150

200

SUPPLY VOLTAGE (VDD) = 5V

10V

15V

8

6

4

2

INPUT FREQUENCY (f) (kHz)

10

1

8

6

4

2

1

8

6

4

2

10

8

6

4

2

8

6

4

2

SUPPLY VOLTAGE (VDD) = 15V

LOAD CAPACITANCE (CL) = 50pF

VDD = 5V

CL = 50pF

VDD = 10V

CL = 15pF

VDD = 10V

CL = 50pF