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74AVCH4T245 датащи(PDF) 5 Page - NXP Semiconductors |
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74AVCH4T245 датащи(HTML) 5 Page - NXP Semiconductors |
5 / 29 page 74AVCH4T245 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 14 December 2011 5 of 29 NXP Semiconductors 74AVCH4T245 4-bit dual supply translating transceiver; 3-state 6.2 Pin description [1] All GND pins must be connected to ground (0 V). 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] The nAn, nDIR and nOE input circuit is referenced to VCC(A); The nBn input circuit is referenced to VCC(B). [3] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. Table 3. Pin description Symbol Pin Description SOT109-1, SOT403-1 and SOT763-1 SOT1161-1 VCC(A) 1 3 supply voltage A (nAn, nOE and nDIR inputs are referenced to VCC(A)) 1DIR, 2DIR 2, 3 4, 5 direction control 1A1, 1A2 4, 5 6, 7 data input or output 2A1, 2A2 6, 7 8, 9 data input or output GND[1] 8, 9 10, 11 ground (0 V) 2B2, 2B1 10, 11 12, 13 data input or output 1B2, 1B1 12, 13 14, 15 data input or output 2OE, 1OE 14, 15 16, 1 output enable input (active LOW) VCC(B) 16 2 supply voltage B (nBn inputs are referenced to VCC(B)) Table 4. Function table[1] Supply voltage Input Input/output[3] VCC(A), VCC(B) nOE[2] nDIR[2] nAn[2] nBn[2] 0.8 V to 3.6 V L L nAn = nBn input 0.8 V to 3.6 V L H input nBn = nAn 0.8 V to 3.6 V H X Z Z GND[3] XXZ Z |
Аналогичный номер детали - 74AVCH4T245_15 |
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Аналогичное описание - 74AVCH4T245_15 |
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