74HC_HCT299_3

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 03 — 28 July 2008

6 of 24

NXP Semiconductors

74HC299; 74HCT299

8-bit universal shift register; 3-state

6.

Functional description

[1]

H = HIGH voltage level;

L = LOW voltage level;

↑ = LOW to HIGH CP transition;

X = don’t care.

7.

Limiting values

[1]

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DSL

18

serial data shift-left input

S1

19

mode select input

20

positive supply voltage

Table 2.

Symbol

Pin

Description

Table 3.

Function table[1]

Input

Response

MR

S1

S0

CP

L

X

X

X

asynchronous reset; Q0 to Q7 = LOW

HHH

↑

parallel load; I/On

→ Qn

HL

H

↑

shift right; DSR

→ Q0, Q0 → Q1, etc.

HHL

↑

shift left; DSL

→ Q7, Q7 → Q6, etc.

H

L

L

X

hold

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+7

V

input clamping current

[1] -

±20

mA

output clamping current

[1] -

±20

mA

output current

standard outputs

-

±25

mA

bus driver outputs

-

±35

mA

supply current

standard outputs

-

50

mA

bus driver outputs

-

70

mA

ground current

standard outputs

−50

-

mA

bus driver outputs

−70

-

mA

storage temperature

−65

+150

°C

total power dissipation

DIP20 package

[2] -

750

mW

SO20 package

[3] -

500

mW

(T)SSOP20 package

[4] -

500

mW