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GS1671A датащи(PDF) 7 Page - Gennum Corporation |
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GS1671A датащи(HTML) 7 Page - Gennum Corporation |
7 / 136 page GS1671A HD/SD SDI Receiver Data Sheet 54389 - 1 September 2012 7 of 136 Figure 4-43: Read Mode ............................................................................................................................... 85 Figure 4-44: GSPI Time Delay .................................................................................................................... 85 Figure 4-45: In-Circuit JTAG ....................................................................................................................127 Figure 4-46: System JTAG .........................................................................................................................128 Figure 4-47: Reset Pulse .............................................................................................................................129 Figure 7-1: Pb-Free Solder Reflow Profile ...........................................................................................135 List of Tables Table 1-1: Pin Descriptions ............................................................................................................................ 8 Table 2-1: Absolute Maximum Ratings................................................................................................... 16 Table 2-2: Recommended Operating Conditions................................................................................ 16 Table 2-3: DC Electrical Characteristics ................................................................................................. 17 Table 2-4: AC Electrical Characteristics ................................................................................................. 19 Table 4-1: Serial Digital Output................................................................................................................. 28 Table 4-2: PLL Loop Bandwidth ................................................................................................................ 29 Table 4-3: Input Clock Requirements...................................................................................................... 30 Table 4-4: Lock Detect Conditions............................................................................................................ 31 Table 4-5: GS1671A Output Video Data Format Selections ............................................................ 35 Table 4-6: GS1671A PCLK Output Rates ................................................................................................ 37 Table 4-7: Switch Line Position for Digital Systems ........................................................................... 40 Table 4-8: Output Signals Available on Programmable Multi-Function Pins............................ 42 Table 4-9: Supported CEA-861 Formats................................................................................................. 44 Table 4-10: CEA861 Timing Formats....................................................................................................... 45 Table 4-11: Supported Video Standard Codes ..................................................................................... 51 Table 4-12: Data Format Register Codes ................................................................................................ 54 Table 4-13: Error Status Register and Error Mask Register.............................................................. 57 Table 4-14: IOPROC_DISABLE Register Bits......................................................................................... 63 Table 4-15: Serial Audio Pin Descriptions ............................................................................................. 69 Table 4-16: Audio Output Formats........................................................................................................... 71 Table 4-17: Audio Data Packet Detect Register ................................................................................... 73 Table 4-18: Audio Group DID Host Interface Settings....................................................................... 74 Table 4-19: Audio Data and Control Packet DID Setting Register................................................. 74 Table 4-20: Audio Buffer Pointer Offset Settings ................................................................................ 78 Table 4-21: Audio Channel Mapping Codes ......................................................................................... 79 Table 4-22: Audio Sample Word Lengths .............................................................................................. 79 Table 4-23: Audio Channel Status Information Registers ................................................................ 80 Table 4-24: Audio Channel Status Block for Regenerate Mode Default Settings ..................... 81 Table 4-25: Audio Mute Control Bits ....................................................................................................... 81 Table 4-26: GSPI Time Delay...................................................................................................................... 85 Table 4-27: GSPI Timing Parameters (50% levels; 3.3V or 1.8V operation) ................................ 86 Table 4-28: Video Core Configuration and Status Registers............................................................ 87 Table 4-29: SD Audio Core Configuration and Status Registers..................................................... 96 Table 4-30: HD Audio Core Configuration and Status Registers.................................................. 111 Table 4-31: ANC Extraction FIFO Access Registers.......................................................................... 126 Table 7-1: Packaging Data......................................................................................................................... 134 |
Аналогичный номер детали - GS1671A |
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Аналогичное описание - GS1671A |
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