LC01707PLF

No.A1928-10/18

Acknowledge (Receive acknowledge)

When the master generates the acknowledge clock pulse, the transmitter opens the SDA line. (SDA line enters the [H]

state.) When the acknowledge clock pulse is in the [H] state, the receiver sets the SDA line to [L] each time it receives

one byte (eight bits) data. When the master works as a receiver, the master informs the slave of the end of data by

omitting acknowledge at the end of data sent from the slave.

Software reset

If the communication is interrupted (microcomputer reset, etc.), it is possible to communicate normally by entering the

below signals and resetting the CPU in software.

*These signal timings restore the communication after its interruption. The register setting is never reset.

*Software reset command is incompatible with I

S

1

2

8

9

Release the SDA line(HIGH)

NACK(master is receiver)

ACK(master is transmitter)

Data output by

transmitter

Data output by

receiver

SCL from

master

START condition

Clock pulse for ACK

ACK:acknowledgement

NACK:not acknowledgement

SDA

SCL

S

1

27

8

9

Sr

P

START condition

Repeated START condition

STOP cindition