TPA3140D2

www.ti.com

SLOS882A – JANUARY 2015 – REVISED APRIL 2015

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage

AVCC to GND, PVCC to GND

–0.3

16

V

GVDD to GND

V

GND to GND

-0.3

0.3

V

Input current

To any pin except supply pins

10

mA

Voltage

–0.3

AVCC + 0.3

V

10

V/ms

Voltage

–0.3

GVDD + 0.3

V

100

V/ms

Voltage

RINN, RINP, LINN, LINP

–0.3

6.3

V

Continuous total power dissipation

See the Thermal Information Table

(4)

–40

85

°C

Temperature range

–65

150

°C

BTL, PVCC > 12 V

4.8

Ω

BTL, PVCC

≤ 12 V

3.2

PBTL, PVCC > 12 V

2.5

PBTL, PVCC

≤ 12 V

1.8

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The voltage slew rate of these pins must be restricted to no more than 10 V/ms. For higher slew rates, use a 100 k

Ω resister in series

with the pins.

(3)

The voltage slew rate of these pins must be restricted to no more than 100 V/ms. For higher slew rates, use a 100 k

Ω resister in series

with the pins.

(4)

The TPA3140D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected

to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection

shutdown. See TI Technical Briefs SLMA002 for more information about using the TSSOP thermal pad.

8.2 ESD Ratings

VALUE

UNIT

±1000

V

±250

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Copyright © 2015, Texas Instruments Incorporated

Submit Documentation Feedback

5

Product Folder Links: TPA3140D2