TS9002

Page 8

TS9002 Rev. 1.0

than 3µA. If the power dissipation of the package is

maintained within the max limit, the output can

source pulses of 100mA of current with V+ set to

+5V. In an effort to minimize external components

needed to address power supply feedback, the

TS9002 output does not produce crowbar switching

current as the output switches. At a power supply

voltage of 3V, the propagation delay of the TS9002

is 6

μs when the output switches from high-to-low

and low-to-high.

Voltage Reference

The TS9002 has an on-board +1.182V voltage

reference with an accuracy of ±0.75%. The REF pin

is able to source and sink 20

μA and 10μA of current,

respectively. The REF pin is referenced to V- and it

should not be bypassed.

Noise Considerations

Noise can play a role in the overall performance of

the TS9002. Despite having a large gain, if the input

voltage is near or equal to the input offset voltage,

the output will randomly switch HIGH and LOW. As a

result, the TS9002 produces a peak-to-peak noise of

it is important to design a layout that minimizes

capacitive coupling from a given output to the

reference pin as crosstalk can add noise and as a

result, degrade performance.

APPLICATIONS INFORMATION

Hysteresis

As a result of circuit noise or unintended parasitic

feedback, many analog comparators often break into

oscillation within their linear region of operation

especially when the applied differential input voltage

approaches 0V (zero volt). Externally-introduced

hysteresis

is

a

well-established

technique

to

stabilizing analog comparator behavior and requires

external components. As shown in Figure 1, adding

as the voltage difference between the two trip points.

When a comparator’s input voltages are equal,

hysteresis effectively forces one comparator input to

move quickly past the other input, moving the input

out of the region where oscillation occurs. Figure 1

illustrates the case in which an IN- input is a fixed

voltage and an IN+ is varied. If the input signals

were reversed, the figure would be the same with an

inverted output. Hysteresis can be generated with

two external resistors using positive feedback as

shown in Figure 2. Resistor R1 is connected

between REF and HYST and R2 is connected

between HYST and V-. This will increase the trip

same amount. If no hysteresis is required, connect

across the REF and HYST pin multiplied by a factor

of 2. The HYST pin can accept a voltage between

REF and REF-50mV, where a voltage of REF-50mV

generates the maximum voltage across R1 and

thus, the maximum hysteresis and hysteresis band

of 50mV and 100mV, respectively. To design the

circuit for a desired hysteresis band, consider the

equations below to acquire the values for resistors

R1 and R2:

Figure 1. Threshold Hysteresis Band

Figure 2. Programming the HYST Pin