поискавой системы для электроныых деталей |
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LSF0101 датащи(PDF) 11 Page - Texas Instruments |
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LSF0101 датащи(HTML) 11 Page - Texas Instruments |
11 / 39 page Vref_A Vref_B 2 19 3 4 5 6 20 EN 18 17 16 15 1 GND A1 A2 A3 A4 B1 B2 B3 B4 SW 7 8 9 10 14 13 12 11 A5 A6 A7 A8 B5 B6 B7 B8 LSF0108 SW SW SW SW SW SW SW 11 LSF0101, LSF0102, LSF0108 www.ti.com SDLS966G – DECEMBER 2013 – REVISED FEBRUAURY 2016 Product Folder Links: LSF0101 LSF0102 LSF0108 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated Functional Block Diagrams (continued) Figure 5. LSF0108 Functional Block Diagram 8.3 Feature Description The LSF family are bidirectional voltage level translators operational from 0.95 to 4.5 V (Vref_A) and 1.8 to 5.5 V (Vref_B). This allows bidirectional voltage translations between 1 V and 5 V without the need for a direction pin in open-drain or push-pull applications. LSF family supports level translation applications with transmission speeds greater than 100 Mbps for open-drain systems using a 30-pF capacitance and 250- Ω pullup resistor. When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and signal distortion. Assuming the higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is limited to the voltage set by Vref_A. When the An port is HIGH, the Bn port is pulled to the drain pull- up supply voltage (Vpu#) by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control. The supply voltage (Vpu#) for each channel can be individually set up with a pull-up resistor. For example, CH1 can be used in up-translation mode (1.2 V ↔ 3.3 V) and CH2 in down-translation mode (2.5 V ↔ 1.8 V). When EN is HIGH, the translator switch is on, and the An I/O is connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The EN input circuit is designed to be supplied by Vref_B. To ensure the high-impedance state during power-up or power-down, EN must be LOW. 8.4 Device Functional Modes Table 1 expresses the functional modes of the LSF devices. (1) EN is controlled by Vref_B logic levels and should be at least 1 V higher than Vref_A for best translator. Table 1. Function Table INPUT EN(1) PIN FUNCTION H An = Bn L H-Z |
Аналогичный номер детали - LSF0101 |
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Аналогичное описание - LSF0101 |
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