поискавой системы для электроныых деталей |
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54FCT574D датащи(PDF) 2 Page - National Semiconductor (TI) |
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54FCT574D датащи(HTML) 2 Page - National Semiconductor (TI) |
2 / 7 page Functional Description The ’FCT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their indi- vidual D inputs that meet the setup and hold times require- ments on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs are in a high impedance state. Operation of the OE input does not affect the state of the flip-flops. Function Table Inputs Internal Outputs Function OE CP D Q O H H or L L NC Z Hold Inputs Internal Outputs Function OE CP D Q O H H or L H NC Z Hold H N L L Z Load H N H H Z Load L N L L L Data Available L N H H H Data Available L H or L L NC NC No Change in Data L H or L H NC NC No Change in Data H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition NC = No Change Logic Diagram DS100966-3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.national.com 2 |
Аналогичный номер детали - 54FCT574D |
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Аналогичное описание - 54FCT574D |
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