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74LVC3G04 датащи(PDF) 2 Page - NXP Semiconductors |
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74LVC3G04 датащи(HTML) 2 Page - NXP Semiconductors |
2 / 13 page 9397 750 13075 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 4 May 2004 2 of 13 Philips Semiconductors 74LVC3G04 Triple inverter 3. Quick reference data [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = total load switching outputs; Σ(C L × VCC 2 × f o) = sum of the outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 1: Quick reference data GND = 0 V; Tamb = 25 °C. Symbol Parameter Conditions Min Typ Max Unit tPHL, tPLH propagation delay inputs nA to output nY VCC = 1.8 V; CL = 30 pF; RL =1kΩ - 3.5 - ns VCC = 2.5 V; CL = 30 pF; RL = 500 Ω - 2.2 - ns VCC = 2.7 V; CL = 50 pF; RL = 500 Ω - 2.7 - ns VCC = 3.3 V; CL = 50 pF; RL = 500 Ω - 2.7 - ns VCC = 5.0 V; CL = 50 pF; RL = 500 Ω - 1.9 - ns CI input capacitance - 2.5 - pF CPD power dissipation capacitance VCC = 3.3 V [1] [2] - 13.5 - pF Table 2: Ordering information Type number Package Temperature range Name Description Version 74LVC3G04DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G04DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 |
Аналогичный номер детали - 74LVC3G04 |
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Аналогичное описание - 74LVC3G04 |
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