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CDCV855 датащи(PDF) 1 Page - Texas Instruments |
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CDCV855 датащи(HTML) 1 Page - Texas Instruments |
1 / 15 page CDCV855, CDCV855I 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS660A – SEPTEMBER 2001 – REVISED DECEMBER 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications D Spread Spectrum Clock Compatible D Operating Frequency: 60 MHz to 180 MHz D Low Jitter (cyc–cyc): ±50 ps D Distributes One Differential Clock Input to Four Differential Clock Outputs D Enters Low Power Mode and Three-State Outputs When Input CLK Signal Is Less Than 20 MHz or PWRDWN Is Low D Operates From Dual 2.5-V Supplies D 28-Pin TSSOP Package D Consumes < 200-µA Quiescent Current D External Feedback PIN (FBIN, FBIN) Are Used to Synchronize the Outputs to the Input Clocks description The CDCV855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to four differential pairs of clock outputs (Y[0:3], Y[0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT). When PWRDWN is high, the outputs switch in phase and frequency with CLK. When PWRDWN is low, all outputs are disabled to a high-impedance state (3-state), and the PLL is shut down (low-power mode). The device also enters this low-power mode when the input frequency falls below a suggested detection frequency that is below 20 MHz (typical 10 MHz). An input frequency detection circuit detects the low-frequency condition and after applying a >20-MHz input signal this detection circuit turns on the PLL again and enables the outputs. When AVDD is tied to GND, the PLL is turned off and bypassed for test purposes. The CDCV855 is also able to track spread spectrum clocking for reduced EMI. Since the CDCV855 is based on PLL circuitry, it requires a stabilization time to achieve phase-lock of the PLL. This stabilization time is required following power up. The CDCV855 is characterized for both commercial and industrial temperature ranges. AVAILABLE OPTIONS T PACKAGED DEVICES TA TSSOP (PW) 0 °C to 70°C CDCV855PW –40 °C to 85°C CDCV855IPW Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 GND Y0 Y0 VDDQ GND CLK CLK VDDQ AVDD AGND VDDQ Y1 Y1 GND GND Y3 Y3 VDDQ PWRDWN FBIN FBIN VDDQ FBOUT FBOUT VDDQ Y2 Y2 GND PW PACKAGE (TOP VIEW) |
Аналогичный номер детали - CDCV855_16 |
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Аналогичное описание - CDCV855_16 |
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